diff --git a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts index c9a3cdd4f79d..8196ea3546a4 100644 --- a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts +++ b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts @@ -57,6 +57,10 @@ status = "okay"; }; +&gpioz { + status = "okay"; +}; + &uart5 { pinctrl-0 = <&uart5_tx_pg9 &uart5_rx_pg10>; pinctrl-names = "default"; @@ -70,3 +74,9 @@ current-speed = <115200>; status = "disabled"; }; + +&i2c8 { + pinctrl-0 = <&i2c8_scl_pz4 &i2c8_sda_pz3>; + pinctrl-names = "default"; + status = "okay"; +}; diff --git a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml index 3f8f8068cd33..fda9a4e57c22 100644 --- a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml +++ b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml @@ -9,6 +9,7 @@ supported: - LED - gpio - shell + - i2c testing: ignore_tags: - cmsis_rtos_v2 diff --git a/drivers/clock_control/clock_stm32_ll_mp2.c b/drivers/clock_control/clock_stm32_ll_mp2.c index 96e455333775..3bcc933953cc 100644 --- a/drivers/clock_control/clock_stm32_ll_mp2.c +++ b/drivers/clock_control/clock_stm32_ll_mp2.c @@ -72,6 +72,24 @@ static int stm32_clock_control_get_subsys_rate(const struct device *dev, case STM32_CLOCK_PERIPH_UART9: *rate = LL_RCC_GetUARTClockFreq(LL_RCC_UART9_CLKSOURCE); break; + case STM32_CLOCK_PERIPH_I2C1: + case STM32_CLOCK_PERIPH_I2C2: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C12_I3C12_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C4: + case STM32_CLOCK_PERIPH_I2C6: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C46_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C3: + case STM32_CLOCK_PERIPH_I2C5: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C35_I3C3_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C7: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C7_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C8: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C8_CLKSOURCE); + break; default: return -ENOTSUP; } diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index 865f4ae48e0e..35c93e5468c2 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -789,3 +789,4 @@ GPIO_DEVICE_INIT_STM32_IF_OKAY(n, N); GPIO_DEVICE_INIT_STM32_IF_OKAY(o, O); GPIO_DEVICE_INIT_STM32_IF_OKAY(p, P); GPIO_DEVICE_INIT_STM32_IF_OKAY(q, Q); +GPIO_DEVICE_INIT_STM32_IF_OKAY(z, Z); diff --git a/drivers/i2c/Kconfig.stm32 b/drivers/i2c/Kconfig.stm32 index 3b7bf71b5517..42b694bac9a3 100644 --- a/drivers/i2c/Kconfig.stm32 +++ b/drivers/i2c/Kconfig.stm32 @@ -41,7 +41,8 @@ config I2C_STM32_COMBINED_INTERRUPT depends on I2C_STM32_INTERRUPT default y if SOC_SERIES_STM32C0X || SOC_SERIES_STM32F0X || \ SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X || \ - SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X + SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X || \ + SOC_SERIES_STM32MP2X config I2C_STM32_BUS_RECOVERY bool "Bus recovery support" diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 946db22bb3b7..5ac3b1d3ff76 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -66,6 +66,15 @@ static const struct device *const gpio_ports[] = { DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioo)), DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiop)), DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioq)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpior)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpios)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiot)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiou)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiov)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiow)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiox)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioy)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioz)), }; /** Number of GPIO ports. */ diff --git a/dts/arm/st/mp2/stm32mp2_m33.dtsi b/dts/arm/st/mp2/stm32mp2_m33.dtsi index 262545ef6741..7a269838c426 100644 --- a/dts/arm/st/mp2/stm32mp2_m33.dtsi +++ b/dts/arm/st/mp2/stm32mp2_m33.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { cpus { @@ -158,6 +159,14 @@ reg = <0x442e0000 DT_SIZE_K(1)>; status = "disabled"; }; + + gpioz: gpio@46200000 { + compatible = "st,stm32mp2-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x46200000 DT_SIZE_K(1)>; + status = "disabled"; + }; }; usart1: serial@40330000 { @@ -240,6 +249,102 @@ interrupts = <150 0>; status = "disabled"; }; + + i2c1: i2c@40120000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40120000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C1, STM32_CLK)>; + clock-frequency = ; + interrupts = <108 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c2: i2c@40130000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40130000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C2, STM32_CLK)>; + clock-frequency = ; + interrupts = <110 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c3: i2c@40140000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40140000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C3, STM32_CLK)>; + clock-frequency = ; + interrupts = <137 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c4: i2c@40150000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40150000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C4, STM32_CLK)>; + clock-frequency = ; + interrupts = <168 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c5: i2c@40160000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40160000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C5, STM32_CLK)>; + clock-frequency = ; + interrupts = <181 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c6: i2c@40170000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40170000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C6, STM32_CLK)>; + clock-frequency = ; + interrupts = <208 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c7: i2c@40180000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40180000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C7, STM32_CLK)>; + clock-frequency = ; + interrupts = <210 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c8: i2c@46040000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x46040000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C8, STM32_CLK)>; + clock-frequency = ; + interrupts = <212 0>; + interrupt-names = "combined"; + status = "disabled"; + }; }; }; diff --git a/include/zephyr/dt-bindings/clock/stm32mp2_clock.h b/include/zephyr/dt-bindings/clock/stm32mp2_clock.h index ba462a0f2874..507df88c26be 100644 --- a/include/zephyr/dt-bindings/clock/stm32mp2_clock.h +++ b/include/zephyr/dt-bindings/clock/stm32mp2_clock.h @@ -50,7 +50,17 @@ #define STM32_CLOCK_PERIPH_UART8 0x798 #define STM32_CLOCK_PERIPH_UART9 0x79C +/* I2C Peripheral */ +#define STM32_CLOCK_PERIPH_I2C1 0x7A0 +#define STM32_CLOCK_PERIPH_I2C2 0x7A8 +#define STM32_CLOCK_PERIPH_I2C3 0x7AC +#define STM32_CLOCK_PERIPH_I2C4 0x7B0 +#define STM32_CLOCK_PERIPH_I2C5 0x7B4 +#define STM32_CLOCK_PERIPH_I2C6 0x7B8 +#define STM32_CLOCK_PERIPH_I2C7 0x7BC +#define STM32_CLOCK_PERIPH_I2C8 0x7C0 + #define STM32_CLOCK_PERIPH_MIN STM32_CLOCK_PERIPH_GPIOA -#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_UART9 +#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_I2C8 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_ */ diff --git a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h index 347304e831b1..83bf63c7360d 100644 --- a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h +++ b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h @@ -27,9 +27,10 @@ #define STM32_PORTO 14 #define STM32_PORTP 15 /* IO port P (0xF) */ #define STM32_PORTQ 16 /* IO port Q (0x10) */ +#define STM32_PORTZ 25 /* IO port Z (0x19) */ #ifndef STM32_PORTS_MAX -#define STM32_PORTS_MAX (STM32_PORTQ + 1) +#define STM32_PORTS_MAX (STM32_PORTZ + 1) #endif /** diff --git a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h index 8a36d80c0366..c405038c6931 100644 --- a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h @@ -55,8 +55,8 @@ * - line [ 5 : 8 ] * - port [ 9 : 13 ] * - * @param port Port ('A'..'Q') - * @param line Pin (0..15) + * @param port Port ('A'..'Q', 'Z') + * @param line Pin (0..25) * @param mode Mode (ANALOG, GPIO_IN, ALTERNATE). */ #define STM32_PINMUX(port, line, mode) \ diff --git a/west.yml b/west.yml index e62a20b45b86..9a82f14ae689 100644 --- a/west.yml +++ b/west.yml @@ -245,7 +245,7 @@ manifest: groups: - hal - name: hal_stm32 - revision: 468e5ad450a75d4baa3eed80e4f77a7700b71203 + revision: pull/293/head path: modules/hal/stm32 groups: - hal