diff --git a/.github/workflows/hello_world_multiplatform.yaml b/.github/workflows/hello_world_multiplatform.yaml index 3ae4f672e2bb..77612ecd7adb 100644 --- a/.github/workflows/hello_world_multiplatform.yaml +++ b/.github/workflows/hello_world_multiplatform.yaml @@ -62,7 +62,7 @@ jobs: uses: zephyrproject-rtos/action-zephyr-setup@b2453c72966ee67b1433be22b250348d48283286 # v1.0.7 with: app-path: zephyr - toolchains: aarch64-zephyr-elf:arc-zephyr-elf:arc64-zephyr-elf:arm-zephyr-eabi:mips-zephyr-elf:riscv64-zephyr-elf:sparc-zephyr-elf:x86_64-zephyr-elf:xtensa-dc233c_zephyr-elf:xtensa-sample_controller32_zephyr-elf + toolchains: aarch64-zephyr-elf:arc-zephyr-elf:arc64-zephyr-elf:arm-zephyr-eabi:mips-zephyr-elf:riscv64-zephyr-elf:sparc-zephyr-elf:x86_64-zephyr-elf:xtensa-dc233c_zephyr-elf:xtensa-sample_controller32_zephyr-elf:rx-zephyr-elf - name: Build firmware working-directory: zephyr diff --git a/CMakeLists.txt b/CMakeLists.txt index 3157813d65c9..8eb997ebcb1e 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -1701,8 +1701,12 @@ list(APPEND list(APPEND post_build_byproducts ${KERNEL_MAP_NAME}) # Use ';' as separator to get proper space in resulting command. -set(gap_fill_prop "$") -set(gap_fill "$<$:${gap_fill_prop}${CONFIG_BUILD_GAP_FILL_PATTERN}>") +# Ignore gapfill for RX target as some RX toolchains generate wrong output image when running +# gapfill for binary format. +if(NOT CONFIG_RX) + set(gap_fill_prop "$") + set(gap_fill "$<$:${gap_fill_prop}${CONFIG_BUILD_GAP_FILL_PATTERN}>") +endif() if(CONFIG_OUTPUT_PRINT_MEMORY_USAGE) target_link_libraries(${logical_target_for_zephyr_elf} $) diff --git a/arch/rx/core/CMakeLists.txt b/arch/rx/core/CMakeLists.txt index 5b3e888db6a5..a45a6d9acc98 100644 --- a/arch/rx/core/CMakeLists.txt +++ b/arch/rx/core/CMakeLists.txt @@ -11,6 +11,8 @@ zephyr_library_sources( thread.c vects.c isr_exit.S + fatal.c + reboot.c ) zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c) diff --git a/arch/rx/core/fatal.c b/arch/rx/core/fatal.c new file mode 100644 index 000000000000..a6dbcaa72fd0 --- /dev/null +++ b/arch/rx/core/fatal.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Fatal fault handling + * + * This module implements the routines necessary for handling fatal faults on + * RX CPUs. + */ + +#include +#include +#include +#include +#include +LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL); + +#ifdef CONFIG_EXCEPTION_DEBUG +static void dump_rx_esf(const struct arch_esf *esf) +{ + LOG_ERR(" ACC_L: 0x%08x ACC_H: 0x%08x", esf->acc_l, esf->acc_h); + LOG_ERR(" r1: 0x%08x r2: 0x%08x r3: 0x%08x", esf->r1, esf->r2, esf->r3); + LOG_ERR(" r4: 0x%08x r5: 0x%08x r6: 0x%08x", esf->r4, esf->r5, esf->r6); + LOG_ERR(" r7: 0x%08x r8: 0x%08x r9: 0x%08x", esf->r7, esf->r8, esf->r9); + LOG_ERR(" r10: 0x%08x r11: 0x%08x r12: 0x%08x", esf->r10, esf->r11, esf->r12); + LOG_ERR(" r13: 0x%08x r14: 0x%08x r15: 0x%08x", esf->r13, esf->r14, esf->r15); + LOG_ERR(" PC: 0x%08x PSW: 0x%08x", esf->entry_point, esf->psw); +} +#endif + +void z_rx_fatal_error(unsigned int reason, const struct arch_esf *esf) +{ +#ifdef CONFIG_EXCEPTION_DEBUG + if (esf != NULL) { + dump_rx_esf(esf); + } +#endif /* CONFIG_EXCEPTION_DEBUG */ + + z_fatal_error(reason, esf); +} +FUNC_NORETURN void arch_system_halt(unsigned int reason) +{ + ARG_UNUSED(reason); + + __asm__("brk"); + + CODE_UNREACHABLE; +} diff --git a/arch/rx/core/reboot.c b/arch/rx/core/reboot.c new file mode 100644 index 000000000000..b3c103885c94 --- /dev/null +++ b/arch/rx/core/reboot.c @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief RX reboot interface + */ + +#include +#include +#include + +/** + * @brief Reset the system + * + * This is stub function to avoid build error with CONFIG_REBOOT=y + * RX specification does not have a common interface for system reset. + * Each RX SoC that has reset feature should implement own reset function. + */ + +void __weak sys_arch_reboot(int type) +{ + ARG_UNUSED(type); +} diff --git a/arch/rx/core/reset.S b/arch/rx/core/reset.S index 80246fe397e3..6c2538da0c5b 100644 --- a/arch/rx/core/reset.S +++ b/arch/rx/core/reset.S @@ -29,10 +29,10 @@ __start : /* load data section from ROM to RAM */ - mov #_mdata,r2 /* src ROM address of data section in R2 */ - mov #_data,r1 /* dest start RAM address of data section in R1 */ - mov #_edata,r3 /* end RAM address of data section in R3 */ - sub r1,r3 /* size of data section in R3 (R3=R3-R1) */ + mov #_image_ram_start,r2 /* src ROM address of data section in R2 */ + mov #__data_start,r1 /* dest start RAM address of data section in R1 */ + mov #__data_region_end,r3 /* end RAM address of data section in R3 */ + sub r1,r3 /* size of data section in R3 (R3=R3-R1) */ #ifdef __RX_ALLOW_STRING_INSNS__ smovf /* block copy R3 bytes from R2 to R1 */ #else diff --git a/arch/rx/core/vects.c b/arch/rx/core/vects.c index 836e9d3adb2f..95e571e7b1fa 100644 --- a/arch/rx/core/vects.c +++ b/arch/rx/core/vects.c @@ -58,7 +58,7 @@ static void __ISR__ INT_Excep_SuperVisorInst(void) { REGISTER_SAVE(); ISR_DIRECT_HEADER(); - z_fatal_error(K_ERR_CPU_EXCEPTION, NULL); + z_rx_fatal_error(K_ERR_CPU_EXCEPTION, NULL); ISR_DIRECT_FOOTER(1); REGISTER_RESTORE_EXIT(); } @@ -68,7 +68,7 @@ static void __ISR__ INT_Excep_AccessInst(void) { REGISTER_SAVE(); ISR_DIRECT_HEADER(); - z_fatal_error(K_ERR_CPU_EXCEPTION, NULL); + z_rx_fatal_error(K_ERR_CPU_EXCEPTION, NULL); ISR_DIRECT_FOOTER(1); REGISTER_RESTORE_EXIT(); } @@ -78,7 +78,7 @@ static void __ISR__ INT_Excep_UndefinedInst(void) { REGISTER_SAVE(); ISR_DIRECT_HEADER(); - z_fatal_error(K_ERR_CPU_EXCEPTION, NULL); + z_rx_fatal_error(K_ERR_CPU_EXCEPTION, NULL); ISR_DIRECT_FOOTER(1); REGISTER_RESTORE_EXIT(); } @@ -88,7 +88,7 @@ static void __ISR__ INT_Excep_FloatingPoint(void) { REGISTER_SAVE(); ISR_DIRECT_HEADER(); - z_fatal_error(K_ERR_CPU_EXCEPTION, NULL); + z_rx_fatal_error(K_ERR_CPU_EXCEPTION, NULL); ISR_DIRECT_FOOTER(1); REGISTER_RESTORE_EXIT(); } @@ -138,6 +138,28 @@ static void __ISR__ reserved_isr(void) REGISTER_RESTORE_EXIT(); } +static void __ISR__ INT_RuntimeFatalInterrupt(void) +{ + REGISTER_SAVE(); + ISR_DIRECT_HEADER(); + + uint32_t reason; + const struct arch_esf *esf; + + /* Read the current values of CPU registers r1 and r0 into C variables + * 'reason' is expected to contain the exception reason (from r1) + * 'esf' is expected to contain a pointer to the exception stack frame (from r0) + */ + __asm__ volatile("mov r1, %0\n\t" + "mov r0, %1\n\t" + : "=r"(reason), "=r"(esf)); + + z_rx_fatal_error(reason, esf); + + ISR_DIRECT_FOOTER(1); + REGISTER_RESTORE_EXIT(); +} + /* wrapper for z_rx_context_switch_isr, defined in switch.S */ extern void __ISR__ switch_isr_wrapper(void); @@ -444,56 +466,90 @@ const void *FixedVectors[] FVECT_SECT = { }; const fp RelocatableVectors[] RVECT_SECT = { - reserved_isr, switch_isr_wrapper, reserved_isr, reserved_isr, reserved_isr, - reserved_isr, reserved_isr, reserved_isr, reserved_isr, reserved_isr, - reserved_isr, reserved_isr, reserved_isr, reserved_isr, reserved_isr, - reserved_isr, int_demux_16, int_demux_17, int_demux_18, int_demux_19, - int_demux_20, int_demux_21, int_demux_22, int_demux_23, int_demux_24, - int_demux_25, int_demux_26, int_demux_27, int_demux_28, int_demux_29, - int_demux_30, int_demux_31, int_demux_32, int_demux_33, int_demux_34, - int_demux_35, int_demux_36, int_demux_37, int_demux_38, int_demux_39, - int_demux_40, int_demux_41, int_demux_42, int_demux_43, int_demux_44, - int_demux_45, int_demux_46, int_demux_47, int_demux_48, int_demux_49, - int_demux_50, int_demux_51, int_demux_52, int_demux_53, int_demux_54, - int_demux_55, int_demux_56, int_demux_57, int_demux_58, int_demux_59, - int_demux_60, int_demux_61, int_demux_62, int_demux_63, int_demux_64, - int_demux_65, int_demux_66, int_demux_67, int_demux_68, int_demux_69, - int_demux_70, int_demux_71, int_demux_72, int_demux_73, int_demux_74, - int_demux_75, int_demux_76, int_demux_77, int_demux_78, int_demux_79, - int_demux_80, int_demux_81, int_demux_82, int_demux_83, int_demux_84, - int_demux_85, int_demux_86, int_demux_87, int_demux_88, int_demux_89, - int_demux_90, int_demux_91, int_demux_92, int_demux_93, int_demux_94, - int_demux_95, int_demux_96, int_demux_97, int_demux_98, int_demux_99, - int_demux_100, int_demux_101, int_demux_102, int_demux_103, int_demux_104, - int_demux_105, int_demux_106, int_demux_107, int_demux_108, int_demux_109, - int_demux_110, int_demux_111, int_demux_112, int_demux_113, int_demux_114, - int_demux_115, int_demux_116, int_demux_117, int_demux_118, int_demux_119, - int_demux_120, int_demux_121, int_demux_122, int_demux_123, int_demux_124, - int_demux_125, int_demux_126, int_demux_127, int_demux_128, int_demux_129, - int_demux_130, int_demux_131, int_demux_132, int_demux_133, int_demux_134, - int_demux_135, int_demux_136, int_demux_137, int_demux_138, int_demux_139, - int_demux_140, int_demux_141, int_demux_142, int_demux_143, int_demux_144, - int_demux_145, int_demux_146, int_demux_147, int_demux_148, int_demux_149, - int_demux_150, int_demux_151, int_demux_152, int_demux_153, int_demux_154, - int_demux_155, int_demux_156, int_demux_157, int_demux_158, int_demux_159, - int_demux_160, int_demux_161, int_demux_162, int_demux_163, int_demux_164, - int_demux_165, int_demux_166, int_demux_167, int_demux_168, int_demux_169, - int_demux_170, int_demux_171, int_demux_172, int_demux_173, int_demux_174, - int_demux_175, int_demux_176, int_demux_177, int_demux_178, int_demux_179, - int_demux_180, int_demux_181, int_demux_182, int_demux_183, int_demux_184, - int_demux_185, int_demux_186, int_demux_187, int_demux_188, int_demux_189, - int_demux_190, int_demux_191, int_demux_192, int_demux_193, int_demux_194, - int_demux_195, int_demux_196, int_demux_197, int_demux_198, int_demux_199, - int_demux_200, int_demux_201, int_demux_202, int_demux_203, int_demux_204, - int_demux_205, int_demux_206, int_demux_207, int_demux_208, int_demux_209, - int_demux_210, int_demux_211, int_demux_212, int_demux_213, int_demux_214, - int_demux_215, int_demux_216, int_demux_217, int_demux_218, int_demux_219, - int_demux_220, int_demux_221, int_demux_222, int_demux_223, int_demux_224, - int_demux_225, int_demux_226, int_demux_227, int_demux_228, int_demux_229, - int_demux_230, int_demux_231, int_demux_232, int_demux_233, int_demux_234, - int_demux_235, int_demux_236, int_demux_237, int_demux_238, int_demux_239, - int_demux_240, int_demux_241, int_demux_242, int_demux_243, int_demux_244, - int_demux_245, int_demux_246, int_demux_247, int_demux_248, int_demux_249, - int_demux_250, int_demux_251, int_demux_252, int_demux_253, int_demux_254, + reserved_isr, switch_isr_wrapper, INT_RuntimeFatalInterrupt, + reserved_isr, reserved_isr, reserved_isr, + reserved_isr, reserved_isr, reserved_isr, + reserved_isr, reserved_isr, reserved_isr, + reserved_isr, reserved_isr, reserved_isr, + reserved_isr, int_demux_16, int_demux_17, + int_demux_18, int_demux_19, int_demux_20, + int_demux_21, int_demux_22, int_demux_23, + int_demux_24, int_demux_25, int_demux_26, + int_demux_27, int_demux_28, int_demux_29, + int_demux_30, int_demux_31, int_demux_32, + int_demux_33, int_demux_34, int_demux_35, + int_demux_36, int_demux_37, int_demux_38, + int_demux_39, int_demux_40, int_demux_41, + int_demux_42, int_demux_43, int_demux_44, + int_demux_45, int_demux_46, int_demux_47, + int_demux_48, int_demux_49, int_demux_50, + int_demux_51, int_demux_52, int_demux_53, + int_demux_54, int_demux_55, int_demux_56, + int_demux_57, int_demux_58, int_demux_59, + int_demux_60, int_demux_61, int_demux_62, + int_demux_63, int_demux_64, int_demux_65, + int_demux_66, int_demux_67, int_demux_68, + int_demux_69, int_demux_70, int_demux_71, + int_demux_72, int_demux_73, int_demux_74, + int_demux_75, int_demux_76, int_demux_77, + int_demux_78, int_demux_79, int_demux_80, + int_demux_81, int_demux_82, int_demux_83, + int_demux_84, int_demux_85, int_demux_86, + int_demux_87, int_demux_88, int_demux_89, + int_demux_90, int_demux_91, int_demux_92, + int_demux_93, int_demux_94, int_demux_95, + int_demux_96, int_demux_97, int_demux_98, + int_demux_99, int_demux_100, int_demux_101, + int_demux_102, int_demux_103, int_demux_104, + int_demux_105, int_demux_106, int_demux_107, + int_demux_108, int_demux_109, int_demux_110, + int_demux_111, int_demux_112, int_demux_113, + int_demux_114, int_demux_115, int_demux_116, + int_demux_117, int_demux_118, int_demux_119, + int_demux_120, int_demux_121, int_demux_122, + int_demux_123, int_demux_124, int_demux_125, + int_demux_126, int_demux_127, int_demux_128, + int_demux_129, int_demux_130, int_demux_131, + int_demux_132, int_demux_133, int_demux_134, + int_demux_135, int_demux_136, int_demux_137, + int_demux_138, int_demux_139, int_demux_140, + int_demux_141, int_demux_142, int_demux_143, + int_demux_144, int_demux_145, int_demux_146, + int_demux_147, int_demux_148, int_demux_149, + int_demux_150, int_demux_151, int_demux_152, + int_demux_153, int_demux_154, int_demux_155, + int_demux_156, int_demux_157, int_demux_158, + int_demux_159, int_demux_160, int_demux_161, + int_demux_162, int_demux_163, int_demux_164, + int_demux_165, int_demux_166, int_demux_167, + int_demux_168, int_demux_169, int_demux_170, + int_demux_171, int_demux_172, int_demux_173, + int_demux_174, int_demux_175, int_demux_176, + int_demux_177, int_demux_178, int_demux_179, + int_demux_180, int_demux_181, int_demux_182, + int_demux_183, int_demux_184, int_demux_185, + int_demux_186, int_demux_187, int_demux_188, + int_demux_189, int_demux_190, int_demux_191, + int_demux_192, int_demux_193, int_demux_194, + int_demux_195, int_demux_196, int_demux_197, + int_demux_198, int_demux_199, int_demux_200, + int_demux_201, int_demux_202, int_demux_203, + int_demux_204, int_demux_205, int_demux_206, + int_demux_207, int_demux_208, int_demux_209, + int_demux_210, int_demux_211, int_demux_212, + int_demux_213, int_demux_214, int_demux_215, + int_demux_216, int_demux_217, int_demux_218, + int_demux_219, int_demux_220, int_demux_221, + int_demux_222, int_demux_223, int_demux_224, + int_demux_225, int_demux_226, int_demux_227, + int_demux_228, int_demux_229, int_demux_230, + int_demux_231, int_demux_232, int_demux_233, + int_demux_234, int_demux_235, int_demux_236, + int_demux_237, int_demux_238, int_demux_239, + int_demux_240, int_demux_241, int_demux_242, + int_demux_243, int_demux_244, int_demux_245, + int_demux_246, int_demux_247, int_demux_248, + int_demux_249, int_demux_250, int_demux_251, + int_demux_252, int_demux_253, int_demux_254, int_demux_255, }; diff --git a/arch/rx/include/kernel_arch_func.h b/arch/rx/include/kernel_arch_func.h index 70058fb5c96a..65041bddc348 100644 --- a/arch/rx/include/kernel_arch_func.h +++ b/arch/rx/include/kernel_arch_func.h @@ -25,6 +25,7 @@ static inline bool arch_is_in_isr(void) } extern void z_rx_arch_switch(void *switch_to, void **switched_from); +extern void z_rx_fatal_error(unsigned int reason, const struct arch_esf *esf); static inline void arch_switch(void *switch_to, void **switched_from) { diff --git a/boards/qemu/rx/qemu_rx.yaml b/boards/qemu/rx/qemu_rx.yaml index 86c6513f1389..db6f48791561 100644 --- a/boards/qemu/rx/qemu_rx.yaml +++ b/boards/qemu/rx/qemu_rx.yaml @@ -9,7 +9,14 @@ simulation: arch: rx toolchain: - cross-compile + - zephyr supported: - serial +testing: + default: true + ignore_tags: + - net + - bluetooth + - can ram: 96 flash: 512 diff --git a/boards/renesas/rsk_rx130/doc/index.rst b/boards/renesas/rsk_rx130/doc/index.rst index c76d4b9bcb89..857cee1e5a48 100644 --- a/boards/renesas/rsk_rx130/doc/index.rst +++ b/boards/renesas/rsk_rx130/doc/index.rst @@ -64,12 +64,14 @@ Programming and Debugging .. zephyr:board-supported-runners:: -Applications for the ``rsk_rx130@512kb`` board target configuration can be -built, flashed, and debugged as below. +Applications for the ``rsk_rx130@512kb`` board target can be built, flashed, and +debugged in the usual way. See :ref:`build_an_application` and +:ref:`application_run` for more details on building and running. -Currently, the Zephyr SDK hasn't added support for RX builds yet, so the GCC for RX toolchain is required and build system need to be set to use "cross-compile". +If you want to build Zephyr application for RSK-RX130 board using Renesas GCC RX toolchain follow +the steps below: - - Download and install GCC for RX v8.3.0.202405 toolchain: + - Download and install GCC for RX toolchain: https://llvm-gcc-renesas.com/rx-download-toolchains/ @@ -90,17 +92,14 @@ Currently, the Zephyr SDK hasn't added support for RX builds yet, so the GCC for Flashing ======== -Program can be flashed to RSKRX130-512KB via Jlink with RX adapter boards. +Program can be flashed to RSKRX130-512KB using Jlink with RX adapter boards, by +connecting the board's debug connector port to the host PC. Here's an example +for building and flashing the :zephyr:code-sample:`hello_world` application. -To flash the program to board - - 1. Connect from board's debug connector port to host PC using Jlink debugger. - - 2. Execute west command - - .. code-block:: console - - west flash +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: rsk_rx130@512kb + :goals: build flash Debugging ========= diff --git a/boards/renesas/rsk_rx130/rsk_rx130.dts b/boards/renesas/rsk_rx130/rsk_rx130.dts index e51b43ddbfcb..a44b3cfea85e 100644 --- a/boards/renesas/rsk_rx130/rsk_rx130.dts +++ b/boards/renesas/rsk_rx130/rsk_rx130.dts @@ -40,7 +40,7 @@ compatible = "gpio-keys"; sw1: button { - label = "Key"; + label = "sw1"; gpios = <&ioport3 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; zephyr,code = ; }; @@ -75,6 +75,10 @@ status = "okay"; }; +&ioport3 { + status = "okay"; +}; + &ioportd { status = "okay"; }; diff --git a/boards/renesas/rsk_rx130/rsk_rx130_512kb.yaml b/boards/renesas/rsk_rx130/rsk_rx130_512kb.yaml index f88145baf5e4..4a715faaf2d3 100644 --- a/boards/renesas/rsk_rx130/rsk_rx130_512kb.yaml +++ b/boards/renesas/rsk_rx130/rsk_rx130_512kb.yaml @@ -7,6 +7,7 @@ type: mcu arch: rx toolchain: - cross-compile + - zephyr supported: - gpio - serial diff --git a/cmake/compiler/gcc/target_rx.cmake b/cmake/compiler/gcc/target_rx.cmake index b4a4895fa901..b2a547ae282c 100644 --- a/cmake/compiler/gcc/target_rx.cmake +++ b/cmake/compiler/gcc/target_rx.cmake @@ -4,7 +4,7 @@ list(APPEND TOOLCHAIN_C_FLAGS) list(APPEND TOOLCHAIN_C_FLAGS -mlittle-endian-data -ffunction-sections -fdata-sections -m64bit-doubles) list(APPEND TOOLCHAIN_LD_FLAGS) -list(APPEND TOOLCHAIN_LD_FLAGS -mlittle-endian-data) +list(APPEND TOOLCHAIN_LD_FLAGS -mlittle-endian-data -ffunction-sections -fdata-sections -m64bit-doubles) if(NOT CONFIG_PICOLIBC) list(APPEND TOOLCHAIN_LD_FLAGS -lm) @@ -12,6 +12,7 @@ endif() if(NOT CONFIG_FPU) list(APPEND TOOLCHAIN_C_FLAGS -nofpu) + list(APPEND TOOLCHAIN_LD_FLAGS -nofpu) endif() if("cross-compile" STREQUAL ${ZEPHYR_TOOLCHAIN_VARIANT}) diff --git a/drivers/serial/uart_renesas_rx_sci_qemu.c b/drivers/serial/uart_renesas_rx_sci_qemu.c index 46e088ea28b9..81d494fab244 100644 --- a/drivers/serial/uart_renesas_rx_sci_qemu.c +++ b/drivers/serial/uart_renesas_rx_sci_qemu.c @@ -51,6 +51,7 @@ LOG_MODULE_REGISTER(renesas_rx_uart_sci_qemu, CONFIG_UART_LOG_LEVEL); #define SSR_RDRF_LEN (1) #define SSR_TDRE_POS (7) #define SSR_TDRE_LEN (1) +#define SCI_SCR_RE (1 << 4) struct uart_renesas_rx_sci_qemu_cfg { mem_addr_t regs; @@ -77,6 +78,7 @@ static void uart_renesas_rx_qemu_write_8(const struct device *dev, uint32_t offs static int uart_renesas_rx_sci_qemu_poll_in(const struct device *dev, unsigned char *c) { + uart_renesas_rx_qemu_write_8(dev, SCR, SCI_SCR_RE); if ((uart_renesas_rx_qemu_read_8(dev, SSR) & REG_MASK(SSR_RDRF)) == 0) { /* There are no characters available to read. */ return -1; diff --git a/dts/rx/renesas/rx-qemu.dtsi b/dts/rx/renesas/rx-qemu.dtsi index 8cbfc2c6608a..1fb6442eb99d 100644 --- a/dts/rx/renesas/rx-qemu.dtsi +++ b/dts/rx/renesas/rx-qemu.dtsi @@ -36,8 +36,11 @@ reg = <0x0087000 0xff>, <0x0087200 0x1f>, <0x0087300 0xff>, - <0x00872f0 0x02>; - reg-names = "IR", "IER", "IPR", "FIR"; + <0x00872f0 0x02>, + <0x0087500 0x0f>, + <0x0087510 0x01>, + <0x0087514 0x01>; + reg-names = "IR", "IER", "IPR", "FIR","IRQCR","IRQFLTE","IRQFLTC0"; }; clocks: clocks { @@ -139,7 +142,7 @@ sram0: memory@0 { device_type = "memory"; compatible = "mmio-sram"; - reg = <0x0 DT_SIZE_K(48)>; + reg = <0x0 DT_SIZE_K(96)>; }; flash-controller@7e0000 { diff --git a/include/zephyr/arch/exception.h b/include/zephyr/arch/exception.h index 16a24415bcb8..68487be0cbd8 100644 --- a/include/zephyr/arch/exception.h +++ b/include/zephyr/arch/exception.h @@ -28,6 +28,8 @@ #include #elif defined(CONFIG_SPARC) #include +#elif defined(CONFIG_RX) +#include #endif #endif /* ZEPHYR_INCLUDE_ARCH_EXCEPTION_H_ */ diff --git a/include/zephyr/arch/rx/arch.h b/include/zephyr/arch/rx/arch.h index c10171188b40..09559e18e6a9 100644 --- a/include/zephyr/arch/rx/arch.h +++ b/include/zephyr/arch/rx/arch.h @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include diff --git a/include/zephyr/arch/rx/error.h b/include/zephyr/arch/rx/error.h new file mode 100644 index 000000000000..2e0b8da6cc9f --- /dev/null +++ b/include/zephyr/arch/rx/error.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Renesas RX arch public error handling + * + * Renesas RX-specific kernel error handling interface. Included by + * rx/arch.h. + */ + +#ifndef ZEPHYR_INCLUDE_ARCH_RX_ERROR_H_ +#define ZEPHYR_INCLUDE_ARCH_RX_ERROR_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define ARCH_EXCEPT(reason_p) \ + do { \ + arch_irq_unlock(0); \ + __asm__ volatile("mov %[_reason], r1\n\t" \ + "int #2\n\t" ::[_reason] "r"(reason_p) \ + : "r1", "memory"); \ + } while (false) + +#ifdef __cplusplus +} +#endif + +#endif /* ZEPHYR_INCLUDE_ARCH_RX_ERROR_H_ */ diff --git a/include/zephyr/arch/rx/linker.ld b/include/zephyr/arch/rx/linker.ld index 58edee9859c4..0ad5c22bd179 100644 --- a/include/zephyr/arch/rx/linker.ld +++ b/include/zephyr/arch/rx/linker.ld @@ -53,6 +53,10 @@ SECTIONS #include +#ifdef CONFIG_LLEXT +#include +#endif + GROUP_START(ROMABLE_REGION) . = ROM_START; /* for kernel logging */ PLACE_SYMBOL_HERE(__rodata_region_start); @@ -64,17 +68,29 @@ SECTIONS SECTION_PROLOGUE(_TEXT_SECTION_NAME,ROM_START,) { + . = ALIGN(4); _image_text_start = .; +/* Located in generated directory. This file is populated by the + * zephyr_linker_sources() Cmake function. + */ +#include *(.text) *(.text.*) *(P) + . = ALIGN(4); etext = .; +#include } GROUP_LINK_IN(ROMABLE_REGION) _image_text_end = .; #include +/* Located in generated directory. This file is populated by calling + * zephyr_linker_sources(ROM_SECTIONS ...). Useful for grouping iterable RO structs. + */ +#include + SECTION_PROLOGUE(.rvectors,,) { _rvectors_start = .; @@ -105,13 +121,26 @@ SECTIONS *(.got) *(.got.plt) } GROUP_LINK_IN(ROMABLE_REGION) + +#include +#include + SECTION_PROLOGUE(_RODATA_SECTION_NAME,,) { *(.rodata) *(.rodata.*) + *(.gnu.linkonce.r) + *(.gnu.linkonce.r.*) *(C_1) *(C_2) *(C) + +/* Located in generated directory. This file is populated by the + * zephyr_linker_sources() Cmake function. + */ +#include +#include + _erodata = .; } GROUP_LINK_IN(ROMABLE_REGION) SECTION_PROLOGUE(eh_frame_hdr,,) @@ -147,13 +176,28 @@ SECTIONS } GROUP_LINK_IN(ROMABLE_REGION) PLACE_SYMBOL_HERE(__rodata_region_end); - _mdata = .; GROUP_END(ROMABLE_REGION) GROUP_START(RAMABLE_REGION) _image_ram_start = .; +#include + +/* Located in generated directory. This file is populated by the + * zephyr_linker_sources() Cmake function. + */ +#include + +#if defined(CONFIG_USERSPACE) +#define APP_SHARED_ALIGN MPU_MIN_SIZE_ALIGN +#define SMEM_PARTITION_ALIGN MPU_ALIGN + +#include + _app_smem_size = _app_smem_end - _app_smem_start; + _app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME); +#endif /* CONFIG_USERSPACE */ + #if CONFIG_SRAM_BASE_ADDRESS == 0 /* RX memory starts at address 0 which can be confused with NULL. To prevent this, block * the first memory page (16 Bytes). @@ -166,7 +210,8 @@ SECTIONS SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,) { - _data = .; + __data_region_start = .; + __data_start = .; *(.data) *(.data.*) *(D) @@ -180,35 +225,48 @@ SECTIONS /* the sections defined in common-ram.ld have to be initialized on * reset as well, to place them before _edata */ #include +#include +#include + +/* Located in generated directory. This file is populated by the + * zephyr_linker_sources() Cmake function. + */ +#include - _edata = .; + __data_region_end = .; SECTION_PROLOGUE(_BSS_SECTION_NAME,,) { _bss = .; + __bss_start = .; *(.bss) *(.bss.**) *(COMMON) *(B) *(B_1) *(B_2) + _ebss = .; + __bss_end = .; + . = ALIGN(128); + _end = .; } GROUP_LINK_IN(RAMABLE_REGION) - _ebss = . ; - #include + _ebss = . ; _image_ram_end = .; _end = .; PROVIDE(__end = _end); - GROUP_END(RAMABLE_REGION) - /* Located in generated directory. This file is populated by the -* zephyr_linker_sources() CMake function. -*/ + * zephyr_linker_sources() Cmake function. + */ #include +#include + + GROUP_END(RAMABLE_REGION) + #include } diff --git a/kernel/mem_slab.c b/kernel/mem_slab.c index a7da66d374fa..880f92f457de 100644 --- a/kernel/mem_slab.c +++ b/kernel/mem_slab.c @@ -114,11 +114,12 @@ static int create_free_list(struct k_mem_slab *slab) slab->free_list = NULL; p = slab->buffer + slab->info.block_size * (slab->info.num_blocks - 1); - while (p >= slab->buffer) { + for (int i = slab->info.num_blocks - 1; i >= 0; i--) { *(char **)p = slab->free_list; slab->free_list = p; p -= slab->info.block_size; } + return 0; } diff --git a/lib/posix/options/posix_internal.h b/lib/posix/options/posix_internal.h index 6fb31dc632ed..0aed495dede2 100644 --- a/lib/posix/options/posix_internal.h +++ b/lib/posix/options/posix_internal.h @@ -22,11 +22,16 @@ */ #define PTHREAD_OBJ_MASK_INIT 0x80000000 -struct posix_thread_attr { +#ifdef CONFIG_RX +struct __packed posix_thread_attr +#else +struct posix_thread_attr +#endif +{ void *stack; /* the following two bitfields should combine to be 32-bits in size */ - uint32_t stacksize : CONFIG_POSIX_PTHREAD_ATTR_STACKSIZE_BITS; - uint16_t guardsize : CONFIG_POSIX_PTHREAD_ATTR_GUARDSIZE_BITS; + uint32_t stacksize: CONFIG_POSIX_PTHREAD_ATTR_STACKSIZE_BITS; + uint16_t guardsize: CONFIG_POSIX_PTHREAD_ATTR_GUARDSIZE_BITS; int8_t priority; uint8_t schedpolicy: 2; bool contentionscope: 1; diff --git a/samples/sensor/sensor_shell/sample.yaml b/samples/sensor/sensor_shell/sample.yaml index b8e98572dbdd..ee22ada3284b 100644 --- a/samples/sensor/sensor_shell/sample.yaml +++ b/samples/sensor/sensor_shell/sample.yaml @@ -16,6 +16,7 @@ tests: min_ram: 20 min_flash: 33 sample.sensor.shell.pytest: + platform_exclude: qemu_rx filter: CONFIG_SERIAL and dt_chosen_enabled("zephyr,shell-uart") min_ram: 40 harness: pytest diff --git a/samples/subsys/shell/shell_module/sample.yaml b/samples/subsys/shell/shell_module/sample.yaml index 9b9e8662ccfa..917def7ece67 100644 --- a/samples/subsys/shell/shell_module/sample.yaml +++ b/samples/subsys/shell/shell_module/sample.yaml @@ -4,6 +4,7 @@ common: filter: not CONFIG_NATIVE_LIBC and not CONFIG_SOC_SERIES_BSIM_NRFXX tests: sample.shell.shell_module: + platform_exclude: qemu_rx filter: CONFIG_SERIAL and dt_chosen_enabled("zephyr,shell-uart") tags: shell harness: shell diff --git a/samples/subsys/testsuite/pytest/shell/testcase.yaml b/samples/subsys/testsuite/pytest/shell/testcase.yaml index 2e76f9208658..a5f18fc7a297 100644 --- a/samples/subsys/testsuite/pytest/shell/testcase.yaml +++ b/samples/subsys/testsuite/pytest/shell/testcase.yaml @@ -3,6 +3,7 @@ common: - test_framework - pytest - shell + platform_exclude: qemu_rx filter: CONFIG_SERIAL and not CONFIG_SMP and dt_chosen_enabled("zephyr,shell-uart") extra_configs: - arch:posix:CONFIG_UART_NATIVE_PTY_0_ON_STDINOUT=y diff --git a/scripts/logging/dictionary/database_gen.py b/scripts/logging/dictionary/database_gen.py index 6c44a67cf35a..8d8a2cb1d0e9 100755 --- a/scripts/logging/dictionary/database_gen.py +++ b/scripts/logging/dictionary/database_gen.py @@ -159,7 +159,7 @@ def find_log_const_symbols(elf): continue for symbol in section.iter_symbols(): - if symbol.name.startswith("log_const_"): + if symbol.name.startswith("log_const_") or symbol.name.startswith("_log_const_"): ret_list.append(symbol) return ret_list @@ -206,6 +206,10 @@ def parse_log_const_symbols(database, log_const_area, log_const_symbols, string_ # Not enough data to unpack continue + if sym.entry['st_size'] == 0: + # Empty entry + continue + str_ptr, level = struct.unpack(formatter, datum) # Offset to rodata section for string diff --git a/scripts/logging/dictionary/dictionary_parser/log_database.py b/scripts/logging/dictionary/dictionary_parser/log_database.py index a3fd378a3254..a45147848538 100644 --- a/scripts/logging/dictionary/dictionary_parser/log_database.py +++ b/scripts/logging/dictionary/dictionary_parser/log_database.py @@ -43,6 +43,9 @@ "riscv" : { "kconfig": "CONFIG_RISCV", }, + "rx" : { + "kconfig": "CONFIG_RX", + }, "xtensa" : { "kconfig": "CONFIG_XTENSA", }, diff --git a/subsys/debug/thread_info.c b/subsys/debug/thread_info.c index 436ef1c58f85..bcd58211e3bb 100644 --- a/subsys/debug/thread_info.c +++ b/subsys/debug/thread_info.c @@ -92,6 +92,9 @@ const size_t _kernel_thread_info_offsets[] = { * unimplemented to avoid the #warning below. */ [THREAD_INFO_OFFSET_T_STACK_PTR] = THREAD_INFO_UNIMPLEMENTED, +#elif defined(CONFIG_RX) + /* RX doesn't store *anything* inside thread objects yet */ + [THREAD_INFO_OFFSET_T_STACK_PTR] = THREAD_INFO_UNIMPLEMENTED, #else /* Use a special value so that OpenOCD knows that obtaining the stack * pointer is not possible on this particular architecture. diff --git a/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h b/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h index 21f9f272a633..de1bdf7e34d2 100644 --- a/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h +++ b/subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h @@ -152,6 +152,16 @@ extern "C" { #endif #elif defined(CONFIG_RISCV) #define PROCESSOR_NAME "riscv" +#elif defined(CONFIG_RX) +#if defined(CONFIG_CPU_RXV1) +#define PROCESSOR_NAME "rxv1" +#elif defined(CONFIG_CPU_RXV2) +#define PROCESSOR_NAME "rxv2" +#elif defined(CONFIG_CPU_RXV3) +#define PROCESSOR_NAME "rxv3" +#else +#define PROCESSOR_NAME "rx" +#endif #elif defined(CONFIG_XTENSA) #define PROCESSOR_NAME "xtensa" #elif defined(CONFIG_SPARC) diff --git a/subsys/testsuite/include/zephyr/interrupt_util.h b/subsys/testsuite/include/zephyr/interrupt_util.h index bbcda92aadfa..8aa529baa172 100644 --- a/subsys/testsuite/include/zephyr/interrupt_util.h +++ b/subsys/testsuite/include/zephyr/interrupt_util.h @@ -58,9 +58,9 @@ static inline uint32_t get_available_nvic_line(uint32_t initial_offset) static inline void trigger_irq(int irq) { printk("Triggering irq : %d\n", irq); -#if defined(CONFIG_SOC_TI_LM3S6965_QEMU) || defined(CONFIG_CPU_CORTEX_M0) \ - || defined(CONFIG_CPU_CORTEX_M0PLUS) || defined(CONFIG_CPU_CORTEX_M1)\ - || defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) +#if defined(CONFIG_SOC_TI_LM3S6965_QEMU) || defined(CONFIG_CPU_CORTEX_M0) || \ + defined(CONFIG_CPU_CORTEX_M0PLUS) || defined(CONFIG_CPU_CORTEX_M1) || \ + defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) /* QEMU does not simulate the STIR register: this is a workaround */ NVIC_SetPendingIRQ(irq); #else @@ -84,8 +84,7 @@ static inline void trigger_irq(int irq) * requesting CPU. */ #if CONFIG_GIC_VER <= 2 - sys_write32(GICD_SGIR_TGTFILT_REQONLY | GICD_SGIR_SGIINTID(irq), - GICD_SGIR); + sys_write32(GICD_SGIR_TGTFILT_REQONLY | GICD_SGIR_SGIINTID(irq), GICD_SGIR); #else uint64_t mpidr = GET_MPIDR(); uint8_t aff0 = MPIDR_AFFLVL(mpidr, 0); @@ -108,7 +107,7 @@ static inline void trigger_irq(int irq) #define VECTOR_MASK 0xFF #else #include -#define LOAPIC_ICR_IPI_TEST 0x00004000U +#define LOAPIC_ICR_IPI_TEST 0x00004000U #endif /* @@ -175,9 +174,7 @@ static inline void trigger_irq(int irq) { uint32_t mip; - __asm__ volatile ("csrrs %0, mip, %1\n" - : "=r" (mip) - : "r" (1 << irq)); + __asm__ volatile("csrrs %0, mip, %1\n" : "=r"(mip) : "r"(1 << irq)); } #endif #elif defined(CONFIG_XTENSA) @@ -218,7 +215,8 @@ static inline void trigger_irq(int irq) __ASSERT(irq < CONFIG_NUM_IRQS, "attempting to trigger invalid IRQ (%u)", irq); __ASSERT(irq >= CONFIG_GEN_IRQ_START_VECTOR, "attempting to trigger reserved IRQ (%u)", irq); - WRITE_BIT(REG(IR_BASE_ADDRESS + irq), 0, true); + _sw_isr_table[irq - CONFIG_GEN_IRQ_START_VECTOR].isr( + _sw_isr_table[irq - CONFIG_GEN_IRQ_START_VECTOR].arg); } #else diff --git a/tests/arch/rx/acc/src/main.c b/tests/arch/rx/acc/src/main.c index 769335cd6cee..7bf4fc072794 100644 --- a/tests/arch/rx/acc/src/main.c +++ b/tests/arch/rx/acc/src/main.c @@ -85,8 +85,6 @@ static void thread_2_entry(void *p1, void *p2, void *p3) ZTEST(rx_acc_tests, test_counting_value) { - uint32_t events; - k_event_init(&my_event); k_tid_t tid_1 = k_thread_create(&thread_1, tstack_thread_1, STACK_SIZE, thread_1_entry, diff --git a/tests/kernel/workq/work/testcase.yaml b/tests/kernel/workq/work/testcase.yaml index b2468b323113..eba7cc4ea638 100644 --- a/tests/kernel/workq/work/testcase.yaml +++ b/tests/kernel/workq/work/testcase.yaml @@ -2,7 +2,11 @@ tests: kernel.workqueue.api: min_flash: 34 tags: kernel - # this platform fails to run due to #40376, all + # hifive1 platform fails to run due to #40376, all # the related CI checks got blocked, so exclude it. - platform_exclude: hifive1 + # qemu_rx platform fails to run due to #92213, exclude this + # for now until the issue is resolved. + platform_exclude: + - hifive1 + - qemu_rx timeout: 80 diff --git a/tests/lib/cpp/libcxx/prj.conf b/tests/lib/cpp/libcxx/prj.conf index f6c6a2a9db46..aa8d7693cedf 100644 --- a/tests/lib/cpp/libcxx/prj.conf +++ b/tests/lib/cpp/libcxx/prj.conf @@ -2,4 +2,5 @@ CONFIG_CPP=y CONFIG_STD_CPP17=y CONFIG_ZTEST=y CONFIG_ZTEST_STACK_SIZE=5120 +CONFIG_COMMON_LIBC_MALLOC=y CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE=32768 diff --git a/tests/subsys/jwt/prj.conf b/tests/subsys/jwt/prj.conf index e8c70f035f9a..0f7ae528bd08 100644 --- a/tests/subsys/jwt/prj.conf +++ b/tests/subsys/jwt/prj.conf @@ -9,3 +9,6 @@ CONFIG_ENTROPY_GENERATOR=y CONFIG_ENTROPY_DEVICE_RANDOM_GENERATOR=y CONFIG_REQUIRES_FULL_LIBC=y + +# Work around for qemu_rx +CONFIG_MBEDTLS_PSA_KEY_SLOT_COUNT=1 diff --git a/tests/subsys/zbus/integration/boards/qemu_rx.conf b/tests/subsys/zbus/integration/boards/qemu_rx.conf new file mode 100644 index 000000000000..bf614d4fe277 --- /dev/null +++ b/tests/subsys/zbus/integration/boards/qemu_rx.conf @@ -0,0 +1,2 @@ +# Work around for QEMU RX board +CONFIG_QEMU_ICOUNT_SHIFT=1 diff --git a/tests/ztest/error_hook/src/main.c b/tests/ztest/error_hook/src/main.c index e4b05fc3eb0d..325f931a62db 100644 --- a/tests/ztest/error_hook/src/main.c +++ b/tests/ztest/error_hook/src/main.c @@ -52,6 +52,15 @@ __no_optimization static void trigger_fault_illegal_instruction(void) /* execute an illegal instruction */ ((void(*)(void))&a)(); +#ifdef CONFIG_RX + /* + * Intentionally execute an illegal instruction by calling a NULL pointer. + * Optimization is disabled to avoid GCC internal error during DWARF frame generation. + * __builtin_unreachable() hints to the compiler that control flow never returns here, + * which prevents faulty CFA emission on RX targets. + */ + __builtin_unreachable(); +#endif } /*