From 72ef60a274bd3b64e46386e2a94c69590bae70f6 Mon Sep 17 00:00:00 2001 From: Younghyun Park Date: Fri, 23 Aug 2024 01:14:24 -0700 Subject: [PATCH 1/3] drivers: spi: dw: fix dfs offset in HSSI controller The DFS(Data Frame Size) is at CTRLR0[4:0] in HSSI controller. Signed-off-by: Younghyun Park --- drivers/spi/spi_dw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c index bb40deb1c859..cd64f5f71007 100644 --- a/drivers/spi/spi_dw.c +++ b/drivers/spi/spi_dw.c @@ -226,7 +226,7 @@ static int spi_dw_configure(const struct device *dev, } /* Word size */ - if (info->max_xfer_size == 32) { + if (!IS_ENABLED(CONFIG_SPI_DW_HSSI) && (info->max_xfer_size == 32)) { ctrlr0 |= DW_SPI_CTRLR0_DFS_32(SPI_WORD_SIZE_GET(config->operation)); } else { ctrlr0 |= DW_SPI_CTRLR0_DFS_16(SPI_WORD_SIZE_GET(config->operation)); From 5d3fe5544ba2435836b7ad89d736c4a50fbbafca Mon Sep 17 00:00:00 2001 From: Younghyun Park Date: Fri, 23 Aug 2024 01:34:40 -0700 Subject: [PATCH 2/3] drivers: spi: dw: fix txftlr in HSSI controller The TXFTLR register has 2 major fields which are TFT for triggering interrupt threshold and TXFTLR for starting transfer threshold. This is to ensure that sufficient data is ready for starting transfer. Signed-off-by: Younghyun Park --- drivers/spi/spi_dw.c | 12 ++++++++++++ drivers/spi/spi_dw.h | 5 +++++ 2 files changed, 17 insertions(+) diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c index cd64f5f71007..56e11e129e52 100644 --- a/drivers/spi/spi_dw.c +++ b/drivers/spi/spi_dw.c @@ -323,6 +323,18 @@ static void spi_dw_update_txftlr(const struct device *dev, } else if (spi->ctx.tx_len < dw_spi_txftlr_dflt) { reg_data = spi->ctx.tx_len - 1; } + } else { +#if defined(CONFIG_SPI_DW_HSSI) && defined(CONFIG_SPI_EXTENDED_MODES) + /* + * TXFTLR field in the TXFTLR register is valid only for + * Controller mode operation + */ + if (!spi->ctx.tx_len) { + reg_data = 0U; + } else if (spi->ctx.tx_len < dw_spi_txftlr_dflt) { + reg_data = (spi->ctx.tx_len - 1) << DW_SPI_TXFTLR_TXFTLR_SHIFT; + } +#endif } LOG_DBG("TxFTLR: %u", reg_data); diff --git a/drivers/spi/spi_dw.h b/drivers/spi/spi_dw.h index e1df26d1c14e..55e28777cc44 100644 --- a/drivers/spi/spi_dw.h +++ b/drivers/spi/spi_dw.h @@ -194,6 +194,11 @@ static int reg_test_bit(uint8_t bit, mm_reg_t addr, uint32_t off) #define DW_SPI_CTRLR0_SRL_BIT (13) #endif +#if defined(CONFIG_SPI_DW_HSSI) && defined(CONFIG_SPI_EXTENDED_MODES) +/* TXFTLR setting. Only valid for Controller operation mode. */ +#define DW_SPI_TXFTLR_TXFTLR_SHIFT (16) +#endif + #define DW_SPI_CTRLR0_SCPH BIT(DW_SPI_CTRLR0_SCPH_BIT) #define DW_SPI_CTRLR0_SCPOL BIT(DW_SPI_CTRLR0_SCPOL_BIT) #define DW_SPI_CTRLR0_SRL BIT(DW_SPI_CTRLR0_SRL_BIT) From 1c8dbab449b6596b801f42a59ad1d7bd2ea7988e Mon Sep 17 00:00:00 2001 From: Younghyun Park Date: Fri, 23 Aug 2024 00:05:21 -0700 Subject: [PATCH 3/3] drivers: spi: dw: read ssi component version Read the Synopsys SSI component version to extend supported capability based on the version. Signed-off-by: Younghyun Park --- drivers/spi/spi_dw.c | 6 ++++++ drivers/spi/spi_dw.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/spi/spi_dw.c b/drivers/spi/spi_dw.c index 56e11e129e52..bd10447e4429 100644 --- a/drivers/spi/spi_dw.c +++ b/drivers/spi/spi_dw.c @@ -566,6 +566,12 @@ int spi_dw_init(const struct device *dev) write_imr(dev, DW_SPI_IMR_MASK); clear_bit_ssienr(dev); + /* SSI component version */ + spi->version = read_ssi_comp_version(dev); + LOG_DBG("Version: %c.%c%c%c", (spi->version >> 24) & 0xff, + (spi->version >> 16) & 0xff, (spi->version >> 8) & 0xff, + spi->version & 0xff); + LOG_DBG("Designware SPI driver initialized on device: %p", dev); err = spi_context_cs_configure_all(&spi->ctx); diff --git a/drivers/spi/spi_dw.h b/drivers/spi/spi_dw.h index 55e28777cc44..55a258046648 100644 --- a/drivers/spi/spi_dw.h +++ b/drivers/spi/spi_dw.h @@ -48,6 +48,7 @@ struct spi_dw_config { struct spi_dw_data { DEVICE_MMIO_RAM; struct spi_context ctx; + uint32_t version; /* ssi comp version */ uint8_t dfs; /* dfs in bytes: 1,2 or 4 */ uint8_t fifo_diff; /* cannot be bigger than FIFO depth */ };