From 8ae6dfa21e231a1c0d69e9e8c110a8b28df5af20 Mon Sep 17 00:00:00 2001 From: Camille BAUD Date: Wed, 19 Mar 2025 13:33:31 +0100 Subject: [PATCH] dts: wch: Enable using whole flash with CH32V208 Enables using the whole flash on CH32V208 This also involves limiting frequency of the CPU to 120Mhz from 144Mhz to meet recommendations. Signed-off-by: Camille BAUD --- dts/riscv/wch/ch32v208/ch32v208.dtsi | 8 ++++---- soc/wch/ch32v/qingke_v4c/Kconfig.defconfig | 9 --------- soc/wch/ch32v/qingke_v4c/Kconfig.defconfig.ch32v208 | 2 +- soc/wch/ch32v/qingke_v4c/vector.S | 7 +++++-- 4 files changed, 10 insertions(+), 16 deletions(-) diff --git a/dts/riscv/wch/ch32v208/ch32v208.dtsi b/dts/riscv/wch/ch32v208/ch32v208.dtsi index 5ad9c971f36b..e8a1d8262798 100644 --- a/dts/riscv/wch/ch32v208/ch32v208.dtsi +++ b/dts/riscv/wch/ch32v208/ch32v208.dtsi @@ -37,7 +37,7 @@ pll: pll { #clock-cells = <0>; compatible = "wch,ch32v20x_30x-pll-clock"; - mul = <18>; + mul = <15>; status = "disabled"; }; }; @@ -54,9 +54,9 @@ #address-cells = <1>; #size-cells = <1>; - flash0: flash@0 { + flash0: flash@8000000 { compatible = "soc-nv-flash"; - reg = <0 DT_SIZE_K(128)>; + reg = <0x08000000 DT_SIZE_K(480)>; }; }; @@ -160,5 +160,5 @@ }; &cpu0 { - clock-frequency = ; + clock-frequency = ; }; diff --git a/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig b/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig index a782adfdfd2b..34e9ca775784 100644 --- a/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig +++ b/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig @@ -6,15 +6,6 @@ if SOC_SERIES_QINGKE_V4C config SYS_CLOCK_HW_CYCLES_PER_SEC default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) -config MAIN_STACK_SIZE - default 512 - -config IDLE_STACK_SIZE - default 256 - -config ISR_STACK_SIZE - default 256 - config CLOCK_CONTROL default y diff --git a/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig.ch32v208 b/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig.ch32v208 index f7b4b3fe1ec9..f425b2c29703 100644 --- a/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig.ch32v208 +++ b/soc/wch/ch32v/qingke_v4c/Kconfig.defconfig.ch32v208 @@ -4,7 +4,7 @@ if SOC_CH32V208 config VECTOR_TABLE_SIZE - default 103 + default 104 config NUM_IRQS default 128 diff --git a/soc/wch/ch32v/qingke_v4c/vector.S b/soc/wch/ch32v/qingke_v4c/vector.S index d078444d85e1..bd9d6895bf8c 100644 --- a/soc/wch/ch32v/qingke_v4c/vector.S +++ b/soc/wch/ch32v/qingke_v4c/vector.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2024 Michael Hope + * Copyright (c) 2025 MASSDRIVER EI (massdriver.space) * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,12 +18,15 @@ GTEXT(__initialize) SECTION_FUNC(vectors, ivt) .option norvc + /* Jump to 0x08000008, into the main flash zone where j __start is */ + lui x5, 0x8000 + jr 0x8(x5) j __start .rept CONFIG_VECTOR_TABLE_SIZE .word _isr_wrapper .endr SECTION_FUNC(vectors, __start) - li a0, 3 + li a0, 0xf csrw mtvec, a0 j __initialize