From 75e9544483de1780b6382a454b887e862303fbfd Mon Sep 17 00:00:00 2001 From: Declan Snyder Date: Tue, 28 Jan 2025 16:04:31 -0600 Subject: [PATCH] spi_nxp_lpspi: Convert to Zephyr Native Driver Remove the shim to the SDK driver, and only use direct register writes in the zephyr driver instead. This will save flash space. Remove mcux branding from all code. While doing this part of the rewrite, I discovered also some issues that I went ahead and fixed: - The driver was hardcoded to always only use PCS 0 no matter what the user provided spi_config set slave to. - Active high CS configuration was not respected. Also fixes an issue where SDK driver performed an althgorithm on 2,048 possible clock configurations before every transfer. This was replaced with a binary search in the native version. And make it so that this configuration does not need to happen every transfer, if the same spi_cfg is used, to improve performance. Various optimizations also due to the fact that the use case is more clear than the SDK was written for, so we can be more straightforward and simpler. Signed-off-by: Declan Snyder --- .../clock_control/clock_control_mcux_ccm.c | 4 +- .../clock_control_mcux_ccm_rev2.c | 4 +- drivers/spi/spi_nxp_lpspi/CMakeLists.txt | 8 +- drivers/spi/spi_nxp_lpspi/Kconfig | 18 +- drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c | 108 +++---- .../spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c | 289 ++++++++++++++---- drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c | 87 +++--- .../spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h | 64 ++-- soc/nxp/imxrt/imxrt10xx/soc.c | 2 +- soc/nxp/imxrt/imxrt118x/soc.c | 4 +- soc/nxp/imxrt/imxrt11xx/soc.c | 2 +- .../spi/spi_loopback/boards/frdm_ke17z.conf | 2 +- .../spi_loopback/boards/frdm_ke17z512.conf | 2 +- .../spi/spi_loopback/boards/frdm_mcxn236.conf | 2 +- .../boards/frdm_mcxn947_mcxn947_cpu0.conf | 2 +- .../frdm_mcxn947_mcxn947_cpu0_qspi.conf | 2 +- .../spi_loopback/boards/mimxrt1010_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1015_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1020_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1024_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1040_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1050_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1060_evk.conf | 2 +- .../spi_loopback/boards/mimxrt1060_evk_C.conf | 2 +- .../spi_loopback/boards/mimxrt1064_evk.conf | 2 +- .../mimxrt1170_evk_mimxrt1176_cm7_A.conf | 2 +- .../mimxrt1180_evk_mimxrt1189_cm33.conf | 2 +- .../boards/mimxrt1180_evk_mimxrt1189_cm7.conf | 2 +- tests/drivers/spi/spi_loopback/testcase.yaml | 6 +- west.yml | 2 +- 30 files changed, 395 insertions(+), 237 deletions(-) diff --git a/drivers/clock_control/clock_control_mcux_ccm.c b/drivers/clock_control/clock_control_mcux_ccm.c index 5ae8d71d979df..3ac804e4f5772 100644 --- a/drivers/clock_control/clock_control_mcux_ccm.c +++ b/drivers/clock_control/clock_control_mcux_ccm.c @@ -20,7 +20,7 @@ #include LOG_MODULE_REGISTER(clock_control); -#ifdef CONFIG_SPI_MCUX_LPSPI +#ifdef CONFIG_SPI_NXP_LPSPI static const clock_name_t lpspi_clocks[] = { kCLOCK_Usb1PllPfd1Clk, kCLOCK_Usb1PllPfd0Clk, @@ -207,7 +207,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, break; #endif -#ifdef CONFIG_SPI_MCUX_LPSPI +#ifdef CONFIG_SPI_NXP_LPSPI case IMX_CCM_LPSPI_CLK: { uint32_t lpspi_mux = CLOCK_GetMux(kCLOCK_LpspiMux); diff --git a/drivers/clock_control/clock_control_mcux_ccm_rev2.c b/drivers/clock_control/clock_control_mcux_ccm_rev2.c index 504faa86bad45..7ce9b13433d2a 100644 --- a/drivers/clock_control/clock_control_mcux_ccm_rev2.c +++ b/drivers/clock_control/clock_control_mcux_ccm_rev2.c @@ -81,7 +81,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, break; #endif -#ifdef CONFIG_SPI_MCUX_LPSPI +#ifdef CONFIG_SPI_NXP_LPSPI #if defined(CONFIG_SOC_SERIES_IMXRT118X) case IMX_CCM_LPSPI0102_CLK: clock_root = kCLOCK_Root_Lpspi0102 + instance; @@ -91,7 +91,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, clock_root = kCLOCK_Root_Lpspi1 + instance; break; #endif /* CONFIG_SOC_SERIES_IMXRT118X */ -#endif /* CONFIG_SPI_MCUX_LPSPI */ +#endif /* CONFIG_SPI_NXP_LPSPI */ #ifdef CONFIG_UART_MCUX_LPUART #if defined(CONFIG_SOC_SERIES_IMXRT118X) diff --git a/drivers/spi/spi_nxp_lpspi/CMakeLists.txt b/drivers/spi/spi_nxp_lpspi/CMakeLists.txt index 49d1616421819..a1aeb15824ea2 100644 --- a/drivers/spi/spi_nxp_lpspi/CMakeLists.txt +++ b/drivers/spi/spi_nxp_lpspi/CMakeLists.txt @@ -1,5 +1,5 @@ -# Copyright 2024 NXP +# Copyright 2024-2025 NXP -zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_LPSPI spi_nxp_lpspi_common.c) -zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_LPSPI_NORMAL spi_nxp_lpspi.c) -zephyr_library_sources_ifdef(CONFIG_SPI_MCUX_LPSPI_DMA spi_nxp_lpspi_dma.c) +zephyr_library_sources_ifdef(CONFIG_SPI_NXP_LPSPI spi_nxp_lpspi_common.c) +zephyr_library_sources_ifdef(CONFIG_SPI_NXP_LPSPI_CPU spi_nxp_lpspi.c) +zephyr_library_sources_ifdef(CONFIG_SPI_NXP_LPSPI_DMA spi_nxp_lpspi_dma.c) diff --git a/drivers/spi/spi_nxp_lpspi/Kconfig b/drivers/spi/spi_nxp_lpspi/Kconfig index 5897daf3655ca..0e6e74c3511e7 100644 --- a/drivers/spi/spi_nxp_lpspi/Kconfig +++ b/drivers/spi/spi_nxp_lpspi/Kconfig @@ -1,7 +1,7 @@ -# Copyright 2018, 2024 NXP +# Copyright 2018, 2024-2025 NXP # SPDX-License-Identifier: Apache-2.0 -config SPI_MCUX_LPSPI +config SPI_NXP_LPSPI bool "NXP LPSPI peripheral" default y depends on DT_HAS_NXP_LPSPI_ENABLED @@ -10,21 +10,21 @@ config SPI_MCUX_LPSPI help Enable support for NXP LPSPI. -if SPI_MCUX_LPSPI +if SPI_NXP_LPSPI -config SPI_MCUX_LPSPI_DMA - bool "MCUX LPSPI SPI DMA Support" +config SPI_NXP_LPSPI_DMA + bool "NXP LPSPI SPI DMA Driver" select DMA depends on $(dt_compat_any_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas) help Enable the SPI DMA mode for SPI instances that enable dma channels in their device tree node. -config SPI_MCUX_LPSPI_NORMAL - bool "NXP MCUX LPSPI driver" +config SPI_NXP_LPSPI_CPU + bool "NXP LPSPI CPU based driver" default y - depends on $(dt_compat_any_not_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas) || !SPI_MCUX_LPSPI_DMA + depends on $(dt_compat_any_not_has_prop,$(DT_COMPAT_NXP_LPSPI),dmas) || !SPI_NXP_LPSPI_DMA help Use the traditional (non-RTIO) SPI driver for NXP LPSPI. -endif # SPI_MCUX_LPSPI +endif # SPI_NXP_LPSPI diff --git a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c index da6305e3e0bd7..557737e706344 100644 --- a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c +++ b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi.c @@ -7,7 +7,7 @@ #define DT_DRV_COMPAT nxp_lpspi #include -LOG_MODULE_REGISTER(spi_mcux_lpspi, CONFIG_SPI_LOG_LEVEL); +LOG_MODULE_REGISTER(spi_nxp_lpspi, CONFIG_SPI_LOG_LEVEL); #include "spi_nxp_lpspi_priv.h" @@ -18,24 +18,16 @@ struct lpspi_driver_data { uint8_t word_size_bytes; }; -static inline void lpspi_wait_tx_fifo_empty(const struct device *dev) -{ - LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - - while (LPSPI_GetTxFifoCount(base) != 0) { - } -} - /* Reads a word from the RX fifo and handles writing it into the RX spi buf */ static inline void lpspi_rx_word_write_bytes(const struct device *dev, size_t offset) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; uint8_t num_bytes = MIN(lpspi_data->word_size_bytes, ctx->rx_len); uint8_t *buf = ctx->rx_buf + offset; - uint32_t word = LPSPI_ReadData(base); + uint32_t word = base->RDR; if (!spi_context_rx_buf_on(ctx) && spi_context_rx_on(ctx)) { /* receive no actual data if rx buf is NULL */ @@ -50,7 +42,7 @@ static inline void lpspi_rx_word_write_bytes(const struct device *dev, size_t of /* Reads a maximum number of words from RX fifo and writes them to the remainder of the RX buf */ static inline size_t lpspi_rx_buf_write_words(const struct device *dev, uint8_t max_read) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; size_t buf_len = ctx->rx_len / lpspi_data->word_size_bytes; @@ -68,13 +60,13 @@ static inline size_t lpspi_rx_buf_write_words(const struct device *dev, uint8_t static inline uint8_t rx_fifo_cur_len(LPSPI_Type *base) { - return (base->FSR & LPSPI_FSR_RXCOUNT_MASK) >> LPSPI_FSR_RXCOUNT_SHIFT; + return FIELD_GET(LPSPI_FSR_RXCOUNT_MASK, base->FSR); } static inline void lpspi_handle_rx_irq(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; uint8_t total_words_written = 0; @@ -82,7 +74,7 @@ static inline void lpspi_handle_rx_irq(const struct device *dev) uint8_t words_read; uint8_t rx_fsr; - LPSPI_ClearStatusFlags(base, kLPSPI_RxDataReadyFlag); + base->SR = LPSPI_SR_RDF_MASK; LOG_DBG("RX FIFO: %d, RX BUF: %p", rx_fsr, ctx->rx_buf); @@ -96,14 +88,14 @@ static inline void lpspi_handle_rx_irq(const struct device *dev) LOG_DBG("RX done %d words to spi buf", total_words_written); if (!spi_context_rx_on(ctx)) { - LPSPI_DisableInterrupts(base, (uint32_t)kLPSPI_RxInterruptEnable); - LPSPI_FlushFifo(base, false, true); + base->IER &= ~LPSPI_IER_RDIE_MASK; + base->CR |= LPSPI_CR_RRF_MASK; /* flush rx fifo */ } } static inline uint32_t lpspi_next_tx_word(const struct device *dev, int offset) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; const uint8_t *byte = ctx->tx_buf + offset; @@ -120,13 +112,13 @@ static inline uint32_t lpspi_next_tx_word(const struct device *dev, int offset) static inline void lpspi_fill_tx_fifo(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; size_t bytes_in_xfer = lpspi_data->fill_len * lpspi_data->word_size_bytes; size_t offset; for (offset = 0; offset < bytes_in_xfer; offset += lpspi_data->word_size_bytes) { - LPSPI_WriteData(base, lpspi_next_tx_word(dev, offset)); + base->TDR = lpspi_next_tx_word(dev, offset); } LOG_DBG("Filled TX FIFO to %d words (%d bytes)", lpspi_data->fill_len, offset); @@ -135,11 +127,11 @@ static inline void lpspi_fill_tx_fifo(const struct device *dev) static inline void lpspi_fill_tx_fifo_nop(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; for (int i = 0; i < lpspi_data->fill_len; i++) { - LPSPI_WriteData(base, 0); + base->TDR = 0; } LOG_DBG("Filled TX fifo with %d NOPs", lpspi_data->fill_len); @@ -147,8 +139,8 @@ static inline void lpspi_fill_tx_fifo_nop(const struct device *dev) static void lpspi_next_tx_fill(const struct device *dev) { - const struct spi_mcux_config *config = dev->config; - struct spi_mcux_data *data = dev->data; + const struct spi_nxp_config *config = dev->config; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; size_t max_chunk; @@ -168,13 +160,13 @@ static void lpspi_next_tx_fill(const struct device *dev) static inline void lpspi_handle_tx_irq(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; spi_context_update_tx(ctx, lpspi_data->word_size_bytes, lpspi_data->fill_len); - LPSPI_ClearStatusFlags(base, kLPSPI_TxDataRequestFlag); + base->SR = LPSPI_SR_TDF_MASK; /* Having no buffer length left indicates transfer is done, if there * was RX to do left, the TX buf would be null but @@ -185,7 +177,7 @@ static inline void lpspi_handle_tx_irq(const struct device *dev) base->TCR = 0; lpspi_wait_tx_fifo_empty(dev); spi_context_cs_control(ctx, false); - LPSPI_DisableInterrupts(base, (uint32_t)kLPSPI_TxInterruptEnable); + base->IER &= ~LPSPI_IER_TDIE_MASK; return; } @@ -194,7 +186,7 @@ static inline void lpspi_handle_tx_irq(const struct device *dev) static inline bool lpspi_is_rx_done(const struct device *dev) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; struct spi_context *ctx = &data->ctx; size_t tx_total = lpspi_data->tx_total_len; @@ -222,16 +214,16 @@ static inline void lpspi_clear_remaining_rx(struct spi_context *ctx) static void lpspi_isr(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - const struct spi_mcux_config *config = dev->config; - uint32_t status_flags = LPSPI_GetStatusFlags(base); - struct spi_mcux_data *data = dev->data; + const struct spi_nxp_config *config = dev->config; + uint32_t status_flags = base->SR; + struct spi_nxp_data *data = dev->data; struct spi_context *ctx = &data->ctx; - if (status_flags & kLPSPI_RxDataReadyFlag) { + if (status_flags & LPSPI_SR_RDF_MASK) { lpspi_handle_rx_irq(dev); } - if (status_flags & kLPSPI_TxDataRequestFlag) { + if (status_flags & LPSPI_SR_TDF_MASK) { lpspi_handle_tx_irq(dev); } @@ -247,7 +239,7 @@ static int transceive(const struct device *dev, const struct spi_config *spi_cfg bool asynchronous, spi_callback_t cb, void *userdata) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct lpspi_driver_data *lpspi_data = (struct lpspi_driver_data *)data->driver_data; int ret; @@ -265,21 +257,14 @@ static int transceive(const struct device *dev, const struct spi_config *spi_cfg lpspi_data->tx_total_len = spi_context_total_tx_len(&data->ctx); lpspi_data->rx_total_len = spi_context_total_rx_len(&data->ctx); - ret = spi_mcux_configure(dev, spi_cfg); + ret = spi_nxp_configure(dev, spi_cfg); if (ret) { goto out; } - LPSPI_FlushFifo(base, true, true); - LPSPI_ClearStatusFlags(base, (uint32_t)kLPSPI_AllStatusFlag); - LPSPI_DisableInterrupts(base, (uint32_t)kLPSPI_AllInterruptEnable); - LOG_DBG("Starting LPSPI transfer"); spi_context_cs_control(&data->ctx, true); - LPSPI_SetFifoWatermarks(base, 0, 0); - LPSPI_Enable(base, true); - /* keep the chip select asserted until the end of the zephyr xfer */ base->TCR |= LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK; /* tcr is written to tx fifo */ @@ -288,8 +273,7 @@ static int transceive(const struct device *dev, const struct spi_config *spi_cfg /* start the transfer sequence which are handled by irqs */ lpspi_next_tx_fill(dev); - LPSPI_EnableInterrupts(base, (uint32_t)kLPSPI_TxInterruptEnable | - (uint32_t)kLPSPI_RxInterruptEnable); + base->IER |= LPSPI_IER_TDIE_MASK | LPSPI_IER_RDIE_MASK; ret = spi_context_wait_for_completion(&data->ctx); out: @@ -298,7 +282,7 @@ static int transceive(const struct device *dev, const struct spi_config *spi_cfg return ret; } -static int spi_mcux_transceive_sync(const struct device *dev, const struct spi_config *spi_cfg, +static int spi_nxp_transceive_sync(const struct device *dev, const struct spi_config *spi_cfg, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs) { @@ -306,7 +290,7 @@ static int spi_mcux_transceive_sync(const struct device *dev, const struct spi_c } #ifdef CONFIG_SPI_ASYNC -static int spi_mcux_transceive_async(const struct device *dev, const struct spi_config *spi_cfg, +static int spi_nxp_transceive_async(const struct device *dev, const struct spi_config *spi_cfg, const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs, spi_callback_t cb, void *userdata) @@ -315,20 +299,20 @@ static int spi_mcux_transceive_async(const struct device *dev, const struct spi_ } #endif /* CONFIG_SPI_ASYNC */ -static DEVICE_API(spi, spi_mcux_driver_api) = { - .transceive = spi_mcux_transceive_sync, +static DEVICE_API(spi, spi_nxp_driver_api) = { + .transceive = spi_nxp_transceive_sync, #ifdef CONFIG_SPI_ASYNC - .transceive_async = spi_mcux_transceive_async, + .transceive_async = spi_nxp_transceive_async, #endif #ifdef CONFIG_SPI_RTIO .iodev_submit = spi_rtio_iodev_default_submit, #endif - .release = spi_mcux_release, + .release = spi_nxp_release, }; -static int spi_mcux_init(const struct device *dev) +static int spi_nxp_init(const struct device *dev) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; int err = 0; err = spi_nxp_init_common(dev); @@ -343,23 +327,23 @@ static int spi_mcux_init(const struct device *dev) #define LPSPI_INIT(n) \ SPI_NXP_LPSPI_COMMON_INIT(n) \ - SPI_MCUX_LPSPI_CONFIG_INIT(n) \ + SPI_NXP_LPSPI_CONFIG_INIT(n) \ \ static struct lpspi_driver_data lpspi_##n##_driver_data; \ \ - static struct spi_mcux_data spi_mcux_data_##n = { \ + static struct spi_nxp_data spi_nxp_data_##n = { \ SPI_NXP_LPSPI_COMMON_DATA_INIT(n) \ .driver_data = &lpspi_##n##_driver_data, \ }; \ \ - SPI_DEVICE_DT_INST_DEFINE(n, spi_mcux_init, NULL, &spi_mcux_data_##n, \ - &spi_mcux_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ - &spi_mcux_driver_api); + SPI_DEVICE_DT_INST_DEFINE(n, spi_nxp_init, NULL, &spi_nxp_data_##n, \ + &spi_nxp_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ + &spi_nxp_driver_api); -#define SPI_MCUX_LPSPI_INIT_IF_DMA(n) IF_DISABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_INIT(n))) +#define SPI_NXP_LPSPI_INIT_IF_DMA(n) IF_DISABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_INIT(n))) -#define SPI_MCUX_LPSPI_INIT(n) \ - COND_CODE_1(CONFIG_SPI_MCUX_LPSPI_DMA, \ - (SPI_MCUX_LPSPI_INIT_IF_DMA(n)), (LPSPI_INIT(n))) +#define SPI_NXP_LPSPI_INIT(n) \ + COND_CODE_1(CONFIG_SPI_NXP_LPSPI_DMA, \ + (SPI_NXP_LPSPI_INIT_IF_DMA(n)), (LPSPI_INIT(n))) -DT_INST_FOREACH_STATUS_OKAY(SPI_MCUX_LPSPI_INIT) +DT_INST_FOREACH_STATUS_OKAY(SPI_NXP_LPSPI_INIT) diff --git a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c index f1edead9e6c33..9790851d2e198 100644 --- a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c +++ b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c @@ -1,36 +1,59 @@ /* - * Copyright 2018, 2024 NXP + * Copyright 2018, 2024-2025 NXP * * SPDX-License-Identifier: Apache-2.0 */ #include -LOG_MODULE_REGISTER(spi_mcux_lpspi_common, CONFIG_SPI_LOG_LEVEL); +LOG_MODULE_REGISTER(spi_nxp_lpspi_common, CONFIG_SPI_LOG_LEVEL); #include "spi_nxp_lpspi_priv.h" -int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg) +#define TWO_EXP(power) BIT(power) + +static LPSPI_Type *const lpspi_bases[] = LPSPI_BASE_PTRS; +static const clock_ip_name_t lpspi_clocks[] = LPSPI_CLOCKS; + +static inline clock_ip_name_t lpspi_get_clock(LPSPI_Type *const base) +{ + clock_ip_name_t clk = -1; /* invalid initial value */ + + ARRAY_FOR_EACH(lpspi_bases, idx) { + if (lpspi_bases[idx] == base) { + clk = lpspi_clocks[idx]; + break; + } + } + + __ASSERT_NO_MSG(clk != -1); + return clk; +} + +void lpspi_wait_tx_fifo_empty(const struct device *dev) +{ + LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); + + while (FIELD_GET(LPSPI_FSR_TXCOUNT_MASK, base->FSR) != 0) { + } +} + +int spi_nxp_release(const struct device *dev, const struct spi_config *spi_cfg) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; spi_context_unlock_unconditionally(&data->ctx); return 0; } -int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cfg) +static inline int lpspi_validate_xfer_args(const struct spi_config *spi_cfg) { - const struct spi_mcux_config *config = dev->config; - struct spi_mcux_data *data = dev->data; - LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); uint32_t word_size = SPI_WORD_SIZE_GET(spi_cfg->operation); - lpspi_master_config_t master_config; - uint32_t clock_freq; - int ret; + uint32_t pcs = spi_cfg->slave; if (spi_cfg->operation & SPI_HALF_DUPLEX) { /* the IP DOES support half duplex, need to implement driver support */ - LOG_ERR("Half-duplex not supported"); + LOG_WRN("Half-duplex not supported"); return -ENOTSUP; } @@ -42,70 +65,222 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf * Minimum hardware word size is 2. Since this driver is intended to work * for 32 bit platforms, and 64 bits is max size, then only 33 and 1 are invalid. */ - LOG_ERR("Word size %d not allowed", word_size); + LOG_WRN("Word size %d not allowed", word_size); return -EINVAL; } - if (spi_cfg->slave > LPSPI_CHIP_SELECT_COUNT) { - LOG_ERR("Peripheral %d select exceeds max %d", spi_cfg->slave, - LPSPI_CHIP_SELECT_COUNT - 1); + if (pcs > LPSPI_CHIP_SELECT_COUNT) { + LOG_WRN("Peripheral %d select exceeds max %d", pcs, LPSPI_CHIP_SELECT_COUNT - 1); return -EINVAL; } - ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clock_freq); - if (ret) { - return ret; + return 0; +} + +static inline void lpspi_reset_state(LPSPI_Type *base) +{ + base->CR |= LPSPI_CR_RTF_MASK | LPSPI_CR_RRF_MASK; /* flush fifos */ + base->IER = 0; /* disable all interrupts */ + base->CR = 0; /* reset control register */ + base->FCR = 0; /* set watermarks to 0 */ +} + +static inline void lpspi_config_setup(LPSPI_Type *base, const struct spi_nxp_config *config, + const struct spi_config *spi_cfg) +{ + uint32_t cfgr1_val = base->CFGR1 & LPSPI_CFGR1_PCSCFG_MASK; + uint32_t pcs_control_bit = 1 << (LPSPI_CFGR1_PCSPOL_SHIFT + spi_cfg->slave); + + if (spi_cfg->operation & SPI_CS_ACTIVE_HIGH) { + cfgr1_val |= pcs_control_bit; + } else { + cfgr1_val &= ~pcs_control_bit; } - if (data->ctx.config != NULL) { - /* Setting the baud rate in LPSPI_MasterInit requires module to be disabled. Only - * disable if already configured, otherwise the clock is not enabled and the - * CR register cannot be written. + cfgr1_val |= LPSPI_CFGR1_MASTER_MASK; + cfgr1_val |= config->tristate_output ? LPSPI_CFGR1_OUTCFG_MASK : 0; + cfgr1_val |= config->data_pin_config << LPSPI_CFGR1_PINCFG_SHIFT; + + base->CFGR1 = cfgr1_val; + + if (IS_ENABLED(CONFIG_DEBUG)) { + /* DEBUG mode makes it so the lpspi does not keep + * running while debugger has halted the chip. + * This makes debugging spi transfers easier. */ - LPSPI_Enable(base, false); - while ((base->CR & LPSPI_CR_MEN_MASK) != 0U) { - /* Wait until LPSPI is disabled. Datasheet: - * After writing 0, MEN (Module Enable) remains set until the LPSPI has - * completed the current transfer and is idle. - */ + base->CR |= LPSPI_CR_DBGEN_MASK; + } +} + +static inline uint32_t lpspi_set_sckdiv(LPSPI_Type *base, uint32_t desired_freq, + uint32_t clock_freq, uint8_t *prescale_value) +{ + uint8_t best_prescaler = 0, best_div = 0; + uint32_t best_freq = 0; + + for (uint8_t prescaler = 0U; prescaler < 8U; prescaler++) { + uint8_t high = 255, low = 0, div = 255; + uint32_t real_freq = 0; + + /* maximum freq won't get better than what we got with previous prescaler */ + if (clock_freq / (TWO_EXP(prescaler) * 2) < best_freq) { + goto done; + } + + while (div > 0) { + div = low + (high - low) / 2; + real_freq = (clock_freq / (TWO_EXP(prescaler) * (div + 2))); + + /* ensure that we do not exceed desired freq */ + if (real_freq > desired_freq) { + low = div + 1; + continue; + } else { + high = div - 1; + } + + /* check if we are closer to the desired */ + if (real_freq >= best_freq) { + best_prescaler = prescaler; + best_div = div; + best_freq = real_freq; + } + + /* if our best found is a match, we're done */ + if (best_freq == desired_freq) { + goto done; + } } } - data->ctx.config = spi_cfg; - - LPSPI_MasterGetDefaultConfig(&master_config); - - master_config.bitsPerFrame = word_size; - master_config.cpol = (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPOL) - ? kLPSPI_ClockPolarityActiveLow - : kLPSPI_ClockPolarityActiveHigh; - master_config.cpha = (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA) - ? kLPSPI_ClockPhaseSecondEdge - : kLPSPI_ClockPhaseFirstEdge; - master_config.direction = - (spi_cfg->operation & SPI_TRANSFER_LSB) ? kLPSPI_LsbFirst : kLPSPI_MsbFirst; - master_config.baudRate = spi_cfg->frequency; - master_config.pcsToSckDelayInNanoSec = config->pcs_sck_delay; - master_config.lastSckToPcsDelayInNanoSec = config->sck_pcs_delay; - master_config.betweenTransferDelayInNanoSec = config->transfer_delay; - master_config.pinCfg = config->data_pin_config; - master_config.dataOutConfig = config->output_config ? kLpspiDataOutTristate : - kLpspiDataOutRetained; - - LPSPI_MasterInit(base, &master_config, clock_freq); - LPSPI_SetDummyData(base, 0); +done: + uint32_t ccr_val = base->CCR & ~LPSPI_CCR_SCKDIV_MASK; - if (IS_ENABLED(CONFIG_DEBUG)) { - base->CR |= LPSPI_CR_DBGEN_MASK; + ccr_val |= LPSPI_CCR_SCKDIV(best_div); + + base->CCR = ccr_val; + + *prescale_value = best_prescaler; + + return best_freq; +} + +static uint8_t lpspi_calc_delay(uint32_t desired_delay_ns, uint32_t best_delay_ns, + uint32_t prescaled_clock, uint32_t additional_scaler) +{ + uint64_t real_delay = NSEC_PER_SEC / prescaled_clock; + uint8_t best_scaler = 0, scaler = 0; + uint32_t diff, min_diff = 0xFFFFFFFF; + + while (scaler < 256 && min_diff != 0) { + real_delay *= ((uint64_t)scaler + 1 + (uint64_t)additional_scaler); + + /* Delay must not be less than desired */ + if (real_delay >= desired_delay_ns) { + diff = (uint32_t)(real_delay - (uint64_t)desired_delay_ns); + if (min_diff > diff) { + /* a better match found */ + min_diff = diff; + best_scaler = scaler; + } + } + + scaler++; } + return best_scaler; +} + +static inline void lpspi_set_delays(const struct device *dev, uint32_t prescaled_clock) +{ + LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); + uint64_t minimum_delay_ns = NSEC_PER_SEC / prescaled_clock; + const struct spi_nxp_config *config = dev->config; + uint32_t ccr = base->CCR; + uint8_t scaler; + + ccr &= ~(LPSPI_CCR_PCSSCK_MASK | LPSPI_CCR_SCKPCS_MASK | LPSPI_CCR_DBT_MASK); + + scaler = (config->pcs_sck_delay <= minimum_delay_ns) + ? lpspi_calc_delay(config->pcs_sck_delay, minimum_delay_ns * 256, + prescaled_clock, 0) + : 0; + ccr |= LPSPI_CCR_PCSSCK(scaler); + + scaler = (config->sck_pcs_delay <= minimum_delay_ns) + ? lpspi_calc_delay(config->sck_pcs_delay, minimum_delay_ns * 256, + prescaled_clock, 0) + : 0; + ccr |= LPSPI_CCR_SCKPCS(scaler); + + scaler = (config->transfer_delay <= (2 * minimum_delay_ns)) + ? lpspi_calc_delay(config->transfer_delay, minimum_delay_ns * 257, + prescaled_clock, 1) + : 0; + ccr |= LPSPI_CCR_DBT(scaler); + + base->CCR = ccr; +} + +static inline uint8_t lpspi_sck_config(const struct device *dev, uint32_t spi_freq, + uint32_t clock_freq) +{ + LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); + uint8_t prescaler = 0; + + lpspi_set_sckdiv(base, spi_freq, clock_freq, &prescaler); + + lpspi_set_delays(dev, clock_freq / TWO_EXP(prescaler)); + + return prescaler; +} + +int spi_nxp_configure(const struct device *dev, const struct spi_config *spi_cfg) +{ + LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); + const struct spi_nxp_config *config = dev->config; + struct spi_nxp_data *data = dev->data; + uint32_t clock_freq = 0; + int ret = 0; + + ret = lpspi_validate_xfer_args(spi_cfg); + if (ret) { + return ret; + } + + ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clock_freq); + if (ret) { + return ret; + } + + lpspi_reset_state(base); + + if (spi_cfg != data->ctx.config) { + data->ctx.config = spi_cfg; + + lpspi_config_setup(base, config, spi_cfg); + + data->prescaler = lpspi_sck_config(dev, spi_cfg->frequency, clock_freq); + } + + base->CR |= LPSPI_CR_MEN_MASK; /* enable the lpspi module */ + + base->TCR = LPSPI_TCR_CPOL(!!(spi_cfg->operation & SPI_MODE_CPOL)) | + LPSPI_TCR_CPHA(!!(spi_cfg->operation & SPI_MODE_CPHA)) | + LPSPI_TCR_LSBF(!!(spi_cfg->operation & SPI_TRANSFER_LSB)) | + LPSPI_TCR_FRAMESZ(SPI_WORD_SIZE_GET(spi_cfg->operation)) | + LPSPI_TCR_PRESCALE(data->prescaler) | LPSPI_TCR_PCS(spi_cfg->slave); + + lpspi_wait_tx_fifo_empty(dev); + return 0; } int spi_nxp_init_common(const struct device *dev) { - const struct spi_mcux_config *config = dev->config; - struct spi_mcux_data *data = dev->data; + LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); + const struct spi_nxp_config *config = dev->config; + struct spi_nxp_data *data = dev->data; int err = 0; DEVICE_MMIO_NAMED_MAP(dev, reg_base, K_MEM_CACHE_NONE | K_MEM_DIRECT_MAP); @@ -117,6 +292,8 @@ int spi_nxp_init_common(const struct device *dev) return -ENODEV; } + CLOCK_EnableClock(lpspi_clocks[lpspi_get_clock(base)]); + err = spi_context_cs_configure_all(&data->ctx); if (err < 0) { return err; diff --git a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c index 7ad3a3206de7f..742b11d56a7a0 100644 --- a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c +++ b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_dma.c @@ -7,7 +7,7 @@ #define DT_DRV_COMPAT nxp_lpspi #include -LOG_MODULE_REGISTER(spi_mcux_lpspi_dma, CONFIG_SPI_LOG_LEVEL); +LOG_MODULE_REGISTER(spi_nxp_lpspi_dma, CONFIG_SPI_LOG_LEVEL); #include #include "spi_nxp_lpspi_priv.h" @@ -34,11 +34,11 @@ struct spi_nxp_dma_data { #define LPSPI_DMA_DONE_FLAG (LPSPI_DMA_RX_DONE_FLAG | LPSPI_DMA_TX_DONE_FLAG) /* This function is executed in the interrupt context */ -static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t channel, int status) +static void spi_nxp_dma_callback(const struct device *dev, void *arg, uint32_t channel, int status) { /* arg directly holds the spi device */ const struct device *spi_dev = arg; - struct spi_mcux_data *data = (struct spi_mcux_data *)spi_dev->data; + struct spi_nxp_data *data = (struct spi_nxp_data *)spi_dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; char debug_char; @@ -83,11 +83,11 @@ static void spi_mcux_dma_callback(const struct device *dev, void *arg, uint32_t spi_context_complete(&data->ctx, spi_dev, 0); } -static struct dma_block_config *spi_mcux_dma_common_load(struct spi_dma_stream *stream, +static struct dma_block_config *spi_nxp_dma_common_load(struct spi_dma_stream *stream, const struct device *dev, const uint8_t *buf, size_t len) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; struct dma_block_config *blk_cfg = &stream->dma_blk_cfg; @@ -114,14 +114,14 @@ static struct dma_block_config *spi_mcux_dma_common_load(struct spi_dma_stream * return blk_cfg; } -static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, size_t len) +static int spi_nxp_dma_tx_load(const struct device *dev, const uint8_t *buf, size_t len) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; /* remember active TX DMA channel (used in callback) */ struct spi_dma_stream *stream = &dma_data->dma_tx; - struct dma_block_config *blk_cfg = spi_mcux_dma_common_load(stream, dev, buf, len); + struct dma_block_config *blk_cfg = spi_nxp_dma_common_load(stream, dev, buf, len); if (buf != NULL) { /* tx direction has memory as source and periph as dest. */ @@ -129,21 +129,21 @@ static int spi_mcux_dma_tx_load(const struct device *dev, const uint8_t *buf, si } /* Dest is LPSPI tx fifo */ - blk_cfg->dest_address = LPSPI_GetTxRegisterAddress(base); + blk_cfg->dest_address = (uint32_t) &(base->TDR); /* give the client dev as arg, as the callback comes from the dma */ /* pass our client origin to the dma: data->dma_tx.dma_channel */ return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg); } -static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t len) +static int spi_nxp_dma_rx_load(const struct device *dev, uint8_t *buf, size_t len) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; /* retrieve active RX DMA channel (used in callback) */ struct spi_dma_stream *stream = &dma_data->dma_rx; - struct dma_block_config *blk_cfg = spi_mcux_dma_common_load(stream, dev, buf, len); + struct dma_block_config *blk_cfg = spi_nxp_dma_common_load(stream, dev, buf, len); if (buf != NULL) { /* rx direction has periph as source and mem as dest. */ @@ -151,7 +151,7 @@ static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t l } /* Source is LPSPI rx fifo */ - blk_cfg->source_address = LPSPI_GetRxRegisterAddress(base); + blk_cfg->source_address = (uint32_t) &(base->RDR); /* pass our client origin to the dma: data->dma_rx.channel */ return dma_config(stream->dma_dev, stream->channel, &stream->dma_cfg); @@ -159,7 +159,7 @@ static int spi_mcux_dma_rx_load(const struct device *dev, uint8_t *buf, size_t l static int wait_dma_rx_tx_done(const struct device *dev) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; int ret; @@ -177,9 +177,9 @@ static int wait_dma_rx_tx_done(const struct device *dev) return 0; } -static inline int spi_mcux_dma_rxtx_load(const struct device *dev, size_t *dma_size) +static inline int spi_nxp_dma_rxtx_load(const struct device *dev, size_t *dma_size) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; struct spi_context *ctx = &data->ctx; int ret = 0; @@ -190,12 +190,12 @@ static inline int spi_mcux_dma_rxtx_load(const struct device *dev, size_t *dma_s /* Load dma blocks of equal length */ *dma_size = spi_context_max_continuous_chunk(ctx); - ret = spi_mcux_dma_tx_load(dev, ctx->tx_buf, *dma_size); + ret = spi_nxp_dma_tx_load(dev, ctx->tx_buf, *dma_size); if (ret != 0) { return ret; } - ret = spi_mcux_dma_rx_load(dev, ctx->rx_buf, *dma_size); + ret = spi_nxp_dma_rx_load(dev, ctx->rx_buf, *dma_size); if (ret != 0) { return ret; } @@ -213,7 +213,7 @@ static inline int spi_mcux_dma_rxtx_load(const struct device *dev, size_t *dma_s #ifdef CONFIG_SPI_ASYNC static int transceive_dma_async(const struct device *dev, spi_callback_t cb, void *userdata) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_context *ctx = &data->ctx; size_t dma_size; int ret; @@ -222,13 +222,13 @@ static int transceive_dma_async(const struct device *dev, spi_callback_t cb, voi ctx->callback = cb; ctx->callback_data = userdata; - ret = spi_mcux_dma_rxtx_load(dev, &dma_size); + ret = spi_nxp_dma_rxtx_load(dev, &dma_size); if (ret) { return ret; } /* Enable DMA Requests */ - LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable); + base->DER |= LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK; return 0; } @@ -239,7 +239,7 @@ static int transceive_dma_async(const struct device *dev, spi_callback_t cb, voi static int transceive_dma_sync(const struct device *dev) { LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; struct spi_context *ctx = &data->ctx; size_t dma_size; int ret; @@ -249,19 +249,19 @@ static int transceive_dma_sync(const struct device *dev) /* Send each spi buf via DMA, updating context as DMA completes */ while (ctx->rx_len > 0 || ctx->tx_len > 0) { /* Load dma block */ - ret = spi_mcux_dma_rxtx_load(dev, &dma_size); + ret = spi_nxp_dma_rxtx_load(dev, &dma_size); if (ret) { return ret; } #ifdef CONFIG_SOC_SERIES_MCXN - while (!(LPSPI_GetStatusFlags(base) & kLPSPI_TxDataRequestFlag)) { + while (!(base->SR & LPSPI_SR_TDF_MASK)) { /* wait until previous tx finished */ } #endif /* Enable DMA Requests */ - LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable); + base->DER = LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK; /* Wait for DMA to finish */ ret = wait_dma_rx_tx_done(dev); @@ -270,13 +270,13 @@ static int transceive_dma_sync(const struct device *dev) } #ifndef CONFIG_SOC_SERIES_MCXN - while ((LPSPI_GetStatusFlags(base) & kLPSPI_ModuleBusyFlag)) { + while (base->SR & LPSPI_SR_MBF_MASK) { /* wait until module is idle */ } #endif /* Disable DMA */ - LPSPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable); + base->DER &= ~(LPSPI_DER_TDDE_MASK | LPSPI_DER_RDDE_MASK); /* Update SPI contexts with amount of data we just sent */ spi_context_update_tx(ctx, 1, dma_size); @@ -294,7 +294,7 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi const struct spi_buf_set *tx_bufs, const struct spi_buf_set *rx_bufs, bool asynchronous, spi_callback_t cb, void *userdata) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); int ret; @@ -302,7 +302,7 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi spi_context_lock(&data->ctx, asynchronous, cb, userdata, spi_cfg); } - ret = spi_mcux_configure(dev, spi_cfg); + ret = spi_nxp_configure(dev, spi_cfg); if (ret && !asynchronous) { goto out; } else if (ret) { @@ -313,8 +313,7 @@ static int transceive_dma(const struct device *dev, const struct spi_config *spi base->TCR |= LPSPI_TCR_CONT_MASK; #endif - /* DMA is fast enough watermarks are not required */ - LPSPI_SetFifoWatermarks(base, 0U, 0U); + base->FCR = 0; spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1); @@ -339,7 +338,7 @@ static int lpspi_dma_dev_ready(const struct device *dma_dev) return 0; } -static int lpspi_dma_devs_ready(struct spi_mcux_data *data) +static int lpspi_dma_devs_ready(struct spi_nxp_data *data) { struct spi_nxp_dma_data *dma_data = (struct spi_nxp_dma_data *)data->driver_data; @@ -347,9 +346,9 @@ static int lpspi_dma_devs_ready(struct spi_mcux_data *data) lpspi_dma_dev_ready(dma_data->dma_rx.dma_dev); } -static int spi_mcux_dma_init(const struct device *dev) +static int spi_nxp_dma_init(const struct device *dev) { - struct spi_mcux_data *data = dev->data; + struct spi_nxp_data *data = dev->data; int err = 0; err = lpspi_dma_devs_ready(data); @@ -384,7 +383,7 @@ static int spi_nxp_dma_transceive_async(const struct device *dev, const struct s } #endif /* CONFIG_SPI_ASYNC */ -static DEVICE_API(spi, spi_mcux_driver_api) = { +static DEVICE_API(spi, spi_nxp_driver_api) = { .transceive = spi_nxp_dma_transceive_sync, #ifdef CONFIG_SPI_ASYNC .transceive_async = spi_nxp_dma_transceive_async, @@ -392,7 +391,7 @@ static DEVICE_API(spi, spi_mcux_driver_api) = { #ifdef CONFIG_SPI_RTIO .iodev_submit = spi_rtio_iodev_default_submit, #endif - .release = spi_mcux_release, + .release = spi_nxp_release, }; static void lpspi_isr(const struct device *dev) @@ -406,17 +405,17 @@ static void lpspi_isr(const struct device *dev) (.dma_tx = {.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(n, tx)), \ .channel = DT_INST_DMAS_CELL_BY_NAME(n, tx, mux), \ .dma_cfg = {.channel_direction = MEMORY_TO_PERIPHERAL, \ - .dma_callback = spi_mcux_dma_callback, \ + .dma_callback = spi_nxp_dma_callback, \ .source_data_size = 1, \ .dest_data_size = 1, \ .block_count = 1, \ - .dma_slot = DT_INST_DMAS_CELL_BY_NAME(n, tx, source)}},)) \ + .dma_slot = DT_INST_DMAS_CELL_BY_NAME(n, tx, source)}},)) \ IF_ENABLED( \ DT_INST_DMAS_HAS_NAME(n, rx), \ (.dma_rx = {.dma_dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(n, rx)), \ .channel = DT_INST_DMAS_CELL_BY_NAME(n, rx, mux), \ .dma_cfg = {.channel_direction = PERIPHERAL_TO_MEMORY, \ - .dma_callback = spi_mcux_dma_callback, \ + .dma_callback = spi_nxp_dma_callback, \ .source_data_size = 1, \ .dest_data_size = 1, \ .block_count = 1, \ @@ -424,16 +423,16 @@ static void lpspi_isr(const struct device *dev) #define LPSPI_DMA_INIT(n) \ SPI_NXP_LPSPI_COMMON_INIT(n) \ - SPI_MCUX_LPSPI_CONFIG_INIT(n) \ + SPI_NXP_LPSPI_CONFIG_INIT(n) \ \ static struct spi_nxp_dma_data lpspi_dma_data##n = {SPI_DMA_CHANNELS(n)}; \ \ - static struct spi_mcux_data spi_mcux_data_##n = {.driver_data = &lpspi_dma_data##n, \ + static struct spi_nxp_data spi_nxp_data_##n = {.driver_data = &lpspi_dma_data##n, \ SPI_NXP_LPSPI_COMMON_DATA_INIT(n)}; \ \ - SPI_DEVICE_DT_INST_DEFINE(n, spi_mcux_dma_init, NULL, &spi_mcux_data_##n, \ - &spi_mcux_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ - &spi_mcux_driver_api); + SPI_DEVICE_DT_INST_DEFINE(n, spi_nxp_dma_init, NULL, &spi_nxp_data_##n, \ + &spi_nxp_config_##n, POST_KERNEL, CONFIG_SPI_INIT_PRIORITY, \ + &spi_nxp_driver_api); #define SPI_NXP_LPSPI_DMA_INIT(n) IF_ENABLED(SPI_NXP_LPSPI_HAS_DMAS(n), (LPSPI_DMA_INIT(n))) diff --git a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h index 5108f6ebbc9c1..76ffd19e56fb5 100644 --- a/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h +++ b/drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "../spi_context.h" @@ -16,23 +17,19 @@ #include #endif -#include - /* If any hardware revisions change this, make it into a DT property. * DONT'T make #ifdefs here by platform. */ #define LPSPI_CHIP_SELECT_COUNT 4 #define LPSPI_MIN_FRAME_SIZE_BITS 8 -/* Required by DEVICE_MMIO_NAMED_* macros */ -#define DEV_CFG(_dev) ((const struct spi_mcux_config *)(_dev)->config) -#define DEV_DATA(_dev) ((struct spi_mcux_data *)(_dev)->data) +#define LPSPI_INTERRUPT_BITS GENMASK(8, 13) -/* flag for SDK API for master transfers */ -#define LPSPI_MASTER_XFER_CFG_FLAGS(slave) \ - kLPSPI_MasterPcsContinuous | (slave << LPSPI_MASTER_PCS_SHIFT) +/* Required by DEVICE_MMIO_NAMED_* macros */ +#define DEV_CFG(_dev) ((const struct spi_nxp_config *)(_dev)->config) +#define DEV_DATA(_dev) ((struct spi_nxp_data *)(_dev)->data) -struct spi_mcux_config { +struct spi_nxp_config { DEVICE_MMIO_NAMED_ROM(reg_base); const struct device *clock_dev; clock_control_subsys_t clock_subsys; @@ -41,23 +38,28 @@ struct spi_mcux_config { uint32_t sck_pcs_delay; uint32_t transfer_delay; const struct pinctrl_dev_config *pincfg; - lpspi_pin_config_t data_pin_config; - bool output_config; + uint8_t data_pin_config; + bool tristate_output; uint8_t tx_fifo_size; uint8_t rx_fifo_size; uint8_t irqn; }; -struct spi_mcux_data { +struct spi_nxp_data { DEVICE_MMIO_NAMED_RAM(reg_base); const struct device *dev; struct spi_context ctx; void *driver_data; size_t transfer_len; + uint8_t prescaler; }; -/* common configure function that verifies spi_cfg validity and set up configuration parameters */ -int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cfg); +void lpspi_wait_tx_fifo_empty(const struct device *dev); + +int spi_nxp_release(const struct device *dev, const struct spi_config *spi_cfg); + +/* verifies spi_cfg validity and set up configuration of hardware for xfer */ +int spi_nxp_configure(const struct device *dev, const struct spi_config *spi_cfg); /* Does these things: * Set data.dev @@ -65,38 +67,34 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf * Configure cs gpio pin if needed * Mux pinctrl to lpspi * Enable LPSPI IRQ at system level + * + * Should be called by specific driver init function */ int spi_nxp_init_common(const struct device *dev); -/* common api function for now */ -int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg); - -/* Argument to MCUX SDK IRQ handler */ -#define LPSPI_IRQ_HANDLE_ARG COND_CODE_1(CONFIG_NXP_LP_FLEXCOMM, (LPSPI_GetInstance(base)), (base)) - -#define SPI_MCUX_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n) \ +#define SPI_NXP_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n) \ nxp_lp_flexcomm_setirqhandler(DEVICE_DT_GET(DT_INST_PARENT(n)), DEVICE_DT_INST_GET(n), \ LP_FLEXCOMM_PERIPH_LPSPI, lpspi_isr); -#define SPI_MCUX_LPSPI_IRQ_FUNC_DISTINCT(n) \ +#define SPI_NXP_LPSPI_IRQ_FUNC_DISTINCT(n) \ IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), lpspi_isr, DEVICE_DT_INST_GET(n), \ 0); \ irq_enable(DT_INST_IRQN(n)); -#define SPI_MCUX_LPSPI_IRQ_FUNC(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), \ +#define SPI_NXP_LPSPI_IRQ_FUNC(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), \ nxp_lp_flexcomm), \ - (SPI_MCUX_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n)), \ - (SPI_MCUX_LPSPI_IRQ_FUNC_DISTINCT(n))) + (SPI_NXP_LPSPI_IRQ_FUNC_LP_FLEXCOMM(n)), \ + (SPI_NXP_LPSPI_IRQ_FUNC_DISTINCT(n))) #define LPSPI_IRQN(n) COND_CODE_1(DT_NODE_HAS_COMPAT(DT_INST_PARENT(n), nxp_lp_flexcomm), \ (DT_IRQN(DT_INST_PARENT(n))), (DT_INST_IRQN(n))) -#define SPI_MCUX_LPSPI_CONFIG_INIT(n) \ - static const struct spi_mcux_config spi_mcux_config_##n = { \ +#define SPI_NXP_LPSPI_CONFIG_INIT(n) \ + static const struct spi_nxp_config spi_nxp_config_##n = { \ DEVICE_MMIO_NAMED_ROM_INIT(reg_base, DT_DRV_INST(n)), \ .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \ - .irq_config_func = spi_mcux_config_func_##n, \ + .irq_config_func = spi_nxp_config_func_##n, \ .pcs_sck_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, pcs_sck_delay), \ DT_INST_PROP(n, pcs_sck_delay)), \ .sck_pcs_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, sck_pcs_delay), \ @@ -105,7 +103,7 @@ int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg) DT_INST_PROP(n, transfer_delay)), \ .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \ .data_pin_config = DT_INST_ENUM_IDX(n, data_pin_config), \ - .output_config = DT_INST_PROP(n, tristate_output), \ + .tristate_output = DT_INST_PROP(n, tristate_output), \ .rx_fifo_size = (uint8_t)DT_INST_PROP(n, rx_fifo_size), \ .tx_fifo_size = (uint8_t)DT_INST_PROP(n, tx_fifo_size), \ .irqn = (uint8_t)LPSPI_IRQN(n), \ @@ -114,14 +112,14 @@ int spi_mcux_release(const struct device *dev, const struct spi_config *spi_cfg) #define SPI_NXP_LPSPI_COMMON_INIT(n) \ PINCTRL_DT_INST_DEFINE(n); \ \ - static void spi_mcux_config_func_##n(const struct device *dev) \ + static void spi_nxp_config_func_##n(const struct device *dev) \ { \ - SPI_MCUX_LPSPI_IRQ_FUNC(n) \ + SPI_NXP_LPSPI_IRQ_FUNC(n) \ } #define SPI_NXP_LPSPI_COMMON_DATA_INIT(n) \ - SPI_CONTEXT_INIT_LOCK(spi_mcux_data_##n, ctx), \ - SPI_CONTEXT_INIT_SYNC(spi_mcux_data_##n, ctx), \ + SPI_CONTEXT_INIT_LOCK(spi_nxp_data_##n, ctx), \ + SPI_CONTEXT_INIT_SYNC(spi_nxp_data_##n, ctx), \ SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx) #define SPI_NXP_LPSPI_HAS_DMAS(n) \ diff --git a/soc/nxp/imxrt/imxrt10xx/soc.c b/soc/nxp/imxrt/imxrt10xx/soc.c index 941ae1d34747f..14fa926a2b812 100644 --- a/soc/nxp/imxrt/imxrt10xx/soc.c +++ b/soc/nxp/imxrt/imxrt10xx/soc.c @@ -208,7 +208,7 @@ static ALWAYS_INLINE void clock_init(void) CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 5); /* Set I2C divider to 6 */ #endif -#ifdef CONFIG_SPI_MCUX_LPSPI +#ifdef CONFIG_SPI_NXP_LPSPI CLOCK_SetMux(kCLOCK_LpspiMux, 1); /* Set SPI source to USB1 PFD0 720M */ CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); /* Set SPI divider to 8 */ #endif diff --git a/soc/nxp/imxrt/imxrt118x/soc.c b/soc/nxp/imxrt/imxrt118x/soc.c index 32a76a579e7a7..2ceb1693c342a 100644 --- a/soc/nxp/imxrt/imxrt118x/soc.c +++ b/soc/nxp/imxrt/imxrt118x/soc.c @@ -268,7 +268,7 @@ static ALWAYS_INLINE void clock_init(void) CLOCK_SetRootClock(kCLOCK_Root_Lpi2c0506, &rootCfg); #endif -#if defined(CONFIG_SPI_MCUX_LPSPI) +#if defined(CONFIG_SPI_NXP_LPSPI) #if (DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi1), okay) \ || DT_NODE_HAS_STATUS(DT_NODELABEL(lpspi2), okay)) @@ -294,7 +294,7 @@ static ALWAYS_INLINE void clock_init(void) CLOCK_SetRootClock(kCLOCK_Root_Lpspi0506, &rootCfg); #endif -#endif /* CONFIG_SPI_MCUX_LPSPI */ +#endif /* CONFIG_SPI_NXP_LPSPI */ #if defined(CONFIG_COUNTER_MCUX_GPT) diff --git a/soc/nxp/imxrt/imxrt11xx/soc.c b/soc/nxp/imxrt/imxrt11xx/soc.c index 3ecc0cb272a7f..bff00712d8e82 100644 --- a/soc/nxp/imxrt/imxrt11xx/soc.c +++ b/soc/nxp/imxrt/imxrt11xx/soc.c @@ -462,7 +462,7 @@ static ALWAYS_INLINE void clock_init(void) CLOCK_SetRootClock(kCLOCK_Root_Enet_Timer1, &rootCfg); #endif -#ifdef CONFIG_SPI_MCUX_LPSPI +#ifdef CONFIG_SPI_NXP_LPSPI /* Configure lpspi using Osc48MDiv2 */ rootCfg.mux = kCLOCK_LPSPI1_ClockRoot_MuxOscRc48MDiv2; rootCfg.div = 1; diff --git a/tests/drivers/spi/spi_loopback/boards/frdm_ke17z.conf b/tests/drivers/spi/spi_loopback/boards/frdm_ke17z.conf index 5014becf5b01d..5f962510513c5 100644 --- a/tests/drivers/spi/spi_loopback/boards/frdm_ke17z.conf +++ b/tests/drivers/spi/spi_loopback/boards/frdm_ke17z.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/frdm_ke17z512.conf b/tests/drivers/spi/spi_loopback/boards/frdm_ke17z512.conf index 5014becf5b01d..5f962510513c5 100644 --- a/tests/drivers/spi/spi_loopback/boards/frdm_ke17z512.conf +++ b/tests/drivers/spi/spi_loopback/boards/frdm_ke17z512.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn236.conf b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn236.conf index a325815e8cf8c..f88ca30d6a182 100644 --- a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn236.conf +++ b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn236.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=n +CONFIG_SPI_NXP_LPSPI_DMA=n CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0.conf b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0.conf index 5014becf5b01d..5f962510513c5 100644 --- a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0.conf +++ b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf index 5014becf5b01d..5f962510513c5 100644 --- a/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf +++ b/tests/drivers/spi/spi_loopback/boards/frdm_mcxn947_mcxn947_cpu0_qspi.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1010_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1010_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1010_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1010_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1015_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1015_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1015_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1015_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1020_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1020_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1020_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1020_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1024_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1024_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1024_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1024_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1040_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1040_evk.conf index 7652fe0f65f56..4537e7967ce46 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1040_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1040_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1050_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1050_evk.conf index 5181a16951d23..d3b8edd4960c1 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1050_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1050_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk_C.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk_C.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk_C.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1060_evk_C.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1064_evk.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1064_evk.conf index bf53e8cb950ec..2aa083da11981 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1064_evk.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1064_evk.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1170_evk_mimxrt1176_cm7_A.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1170_evk_mimxrt1176_cm7_A.conf index 7652fe0f65f56..4537e7967ce46 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1170_evk_mimxrt1176_cm7_A.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1170_evk_mimxrt1176_cm7_A.conf @@ -3,5 +3,5 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.conf index 9b2a9986e38eb..02eef11fb9ee9 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm33.conf @@ -3,6 +3,6 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n CONFIG_DMA_MCUX_USE_DTCM_FOR_DMA_DESCRIPTORS=n diff --git a/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.conf b/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.conf index 9b2a9986e38eb..02eef11fb9ee9 100644 --- a/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.conf +++ b/tests/drivers/spi/spi_loopback/boards/mimxrt1180_evk_mimxrt1189_cm7.conf @@ -3,6 +3,6 @@ # # SPDX-License-Identifier: Apache-2.0 # -CONFIG_SPI_MCUX_LPSPI_DMA=y +CONFIG_SPI_NXP_LPSPI_DMA=y CONFIG_SPI_ASYNC=n CONFIG_DMA_MCUX_USE_DTCM_FOR_DMA_DESCRIPTORS=n diff --git a/tests/drivers/spi/spi_loopback/testcase.yaml b/tests/drivers/spi/spi_loopback/testcase.yaml index 420a16c10d879..a8727b8f04a1d 100644 --- a/tests/drivers/spi/spi_loopback/testcase.yaml +++ b/tests/drivers/spi/spi_loopback/testcase.yaml @@ -16,16 +16,16 @@ tests: drivers.spi.loopback.lpspi.dma: filter: DT_HAS_NXP_LPSPI_ENABLED and DT_HAS_NXP_MCUX_EDMA_ENABLED extra_configs: - - CONFIG_SPI_MCUX_LPSPI_DMA=y + - CONFIG_SPI_NXP_LPSPI_DMA=y drivers.spi.loopback.lpspi.async.unset: filter: DT_HAS_NXP_LPSPI_ENABLED and DT_HAS_NXP_MCUX_EDMA_ENABLED extra_configs: - - CONFIG_SPI_MCUX_LPSPI_DMA=n + - CONFIG_SPI_NXP_LPSPI_DMA=n - CONFIG_SPI_ASYNC=n drivers.spi.loopback.lpspi.dma.async.unset: filter: DT_HAS_NXP_LPSPI_ENABLED and DT_HAS_NXP_MCUX_EDMA_ENABLED extra_configs: - - CONFIG_SPI_MCUX_LPSPI_DMA=y + - CONFIG_SPI_NXP_LPSPI_DMA=y - CONFIG_SPI_ASYNC=n drivers.spi.loopback.rtio: extra_configs: diff --git a/west.yml b/west.yml index 0d029ed4b0c9d..51e9c8f254e1c 100644 --- a/west.yml +++ b/west.yml @@ -203,7 +203,7 @@ manifest: groups: - hal - name: hal_nxp - revision: 49ff7e33f848e4b59da59369a77da63e346fb1a3 + revision: pull/504/head path: modules/hal/nxp groups: - hal