From d25ce14130d2d4be65e7030abc216f14d3eb6394 Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Fri, 18 Jun 2021 22:06:36 -0300
Subject: [PATCH 1/5] soc: atmel: sam4l: Enable RC32K osc

Enable sam4l internal factory calibrated RC32K clock source.  The RC32K
was used as source for Generic Clock 5 using 32 as divider.  The output
is a 1024 Hz clock that can be used by GLOC and TC0 peripherals.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 soc/atmel/sam/sam4l/soc.c | 33 ++++++++++++++++++
 soc/atmel/sam/sam4l/soc.h | 70 ++++++++++++++++++++++++++++++++-------
 2 files changed, 91 insertions(+), 12 deletions(-)

diff --git a/soc/atmel/sam/sam4l/soc.c b/soc/atmel/sam/sam4l/soc.c
index fbc939842f34..ae34131515a5 100644
--- a/soc/atmel/sam/sam4l/soc.c
+++ b/soc/atmel/sam/sam4l/soc.c
@@ -56,6 +56,19 @@ static inline bool osc_is_ready(uint8_t id)
 	}
 }
 
+/**
+ * Enable Backup System Control Oscilator RC32K
+ */
+static inline void osc_priv_enable_rc32k(void)
+{
+	uint32_t temp = BSCIF->RC32KCR;
+	uint32_t addr = (uint32_t)&BSCIF->RC32KCR - (uint32_t)BSCIF;
+
+	BSCIF->UNLOCK = BSCIF_UNLOCK_KEY(0xAAu)
+		      | BSCIF_UNLOCK_ADDR(addr);
+	BSCIF->RC32KCR = temp | BSCIF_RC32KCR_EN32K | BSCIF_RC32KCR_EN;
+}
+
 /**
  * The PLL options #PLL_OPT_VCO_RANGE_HIGH and #PLL_OPT_OUTPUT_DIV will
  * be set automatically based on the calculated target frequency.
@@ -153,6 +166,8 @@ static inline void flashcalw_issue_command(uint32_t command, int page_number)
  */
 static ALWAYS_INLINE void clock_init(void)
 {
+	uint32_t gen_clk_conf;
+
 	/* Disable PicoCache and Enable HRAMC1 as extended RAM */
 	soc_pmc_peripheral_enable(
 		PM_CLOCK_MASK(PM_CLK_GRP_HSB, SYSCLK_HRAMC1_DATA));
@@ -224,6 +239,24 @@ static ALWAYS_INLINE void clock_init(void)
 	PM->UNLOCK = PM_UNLOCK_KEY(0xAAu) |
 		     PM_UNLOCK_ADDR((uint32_t)&PM->MCCTRL - (uint32_t)PM);
 	PM->MCCTRL = OSC_SRC_PLL0;
+
+	/** Enable RC32K Oscilator */
+	osc_priv_enable_rc32k();
+	while (!osc_is_ready(OSC_ID_RC32K)) {
+		;
+	}
+
+	/** Enable Generic Clock 5
+	 *   Source: RC32K
+	 *      Div: 32
+	 *      Clk: 1024 Hz
+	 *  The GCLK-5 can be used by GLOC, TC0 and RC32KIFB_REF
+	 */
+	gen_clk_conf = SCIF_GCCTRL_RESETVALUE;
+	gen_clk_conf |= SCIF_GCCTRL_OSCSEL(GEN_CLK_SRC_RC32K);
+	gen_clk_conf |= SCIF_GCCTRL_DIVEN;
+	gen_clk_conf |= SCIF_GCCTRL_DIV(((32 + 1) / 2) - 1);
+	SCIF->GCCTRL[GEN_CLK_TC0_GLOC_RC32] = gen_clk_conf | SCIF_GCCTRL_CEN;
 }
 
 void soc_reset_hook(void)
diff --git a/soc/atmel/sam/sam4l/soc.h b/soc/atmel/sam/sam4l/soc.h
index ca91575ad1f2..09180c6e2b6a 100644
--- a/soc/atmel/sam/sam4l/soc.h
+++ b/soc/atmel/sam/sam4l/soc.h
@@ -208,18 +208,64 @@
  *   10- ADCIFE
  *   11- Master generic clock. Can be used as source for other generic clocks.
  */
-#define GEN_CLK_DFLL_REF	0
-#define GEN_CLK_DFLL_DITHER	1
-#define GEN_CLK_AST		2
-#define GEN_CLK_CATB		3
-#define GEN_CLK_AESA		4
-#define GEN_CLK_GLOC		5
-#define GEN_CLK_ABDACB		6
-#define GEN_CLK_USBC		7
-#define GEN_CLK_TC1_PEVC0	8
-#define GEN_CLK_PLL0_PEVC1	9
-#define GEN_CLK_ADCIFE		10
-#define GEN_CLK_MASTER_GEN	11
+#define GEN_CLK_DFLL_REF        0
+#define GEN_CLK_DFLL_DITHER     1
+#define GEN_CLK_AST             2
+#define GEN_CLK_CATB            3
+#define GEN_CLK_AESA            4
+#define GEN_CLK_TC0_GLOC_RC32   5
+#define GEN_CLK_ABDACB          6
+#define GEN_CLK_USBC            7
+#define GEN_CLK_TC1_PEVC0       8
+#define GEN_CLK_PLL0_PEVC1      9
+#define GEN_CLK_ADCIFE          10
+#define GEN_CLK_MASTER_GEN      11
+
+/**
+ *    0-  System RC oscillator
+ *    1-  32 kHz oscillator
+ *    2-  DFLL
+ *    3-  Oscillator 0
+ *    4-  80 MHz RC oscillator
+ *    5-  4-8-12 MHz RC oscillator
+ *    6-  1 MHz RC oscillator
+ *    7-  CPU clock
+ *    8-  High Speed Bus clock
+ *    9-  Peripheral Bus A clock
+ *    10- Peripheral Bus B clock
+ *    11- Peripheral Bus C clock
+ *    12- Peripheral Bus D clock
+ *    13- 32 kHz RC oscillator
+ *    15- 1 kHz output from OSC32K
+ *    16- PLL0
+ *    17- High resolution prescaler
+ *    18- Fractional prescaler
+ *    19- GCLKIN0
+ *    20- GCLKIN1
+ *    21- GCLK11
+ */
+
+#define GEN_CLK_SRC_RCSYS	0
+#define GEN_CLK_SRC_OSC32K	1
+#define GEN_CLK_SRC_DFLL	2
+#define GEN_CLK_SRC_OSC0	3
+#define GEN_CLK_SRC_RC80M	4
+#define GEN_CLK_SRC_RCFAST	5
+#define GEN_CLK_SRC_RC1M	6
+#define GEN_CLK_SRC_CLK_CPU	7
+#define GEN_CLK_SRC_CLK_HSB	8
+#define GEN_CLK_SRC_CLK_PBA	9
+#define GEN_CLK_SRC_CLK_PBB	10
+#define GEN_CLK_SRC_CLK_PBC	11
+#define GEN_CLK_SRC_CLK_PBD	12
+#define GEN_CLK_SRC_RC32K	13
+#define GEN_CLK_SRC_CLK_1K	15
+#define GEN_CLK_SRC_PLL0	16
+#define GEN_CLK_SRC_HRPCLK	17
+#define GEN_CLK_SRC_FPCLK	18
+#define GEN_CLK_SRC_GCLKIN0	19
+#define GEN_CLK_SRC_GCLKIN1	20
+#define GEN_CLK_SRC_GCLK11	21
 
 #endif /* !_ASMLANGUAGE */
 

From 11597e0f047cb99383ba96e190f409099fb45226 Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Fri, 18 Jun 2021 22:32:01 -0300
Subject: [PATCH 2/5] drivers: counter: sam: tc: Update sam4l freq idx 0

The Atmel sam4l have generic clock 5 enabled at 1024Hz.  Update sam4l
sam_tc_input_freq_table index 0 to reflect right value.

signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 drivers/counter/counter_sam_tc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/counter/counter_sam_tc.c b/drivers/counter/counter_sam_tc.c
index 69c2e2ddd9eb..57ae3c6dd676 100644
--- a/drivers/counter/counter_sam_tc.c
+++ b/drivers/counter/counter_sam_tc.c
@@ -81,7 +81,7 @@ static const uint32_t sam_tc_input_freq_table[] = {
 	SOC_ATMEL_SAM_MCK_FREQ_HZ / 128,
 	32768,
 #elif defined(CONFIG_SOC_SERIES_SAM4L)
-	USEC_PER_SEC,
+	1024,
 	SOC_ATMEL_SAM_MCK_FREQ_HZ / 2,
 	SOC_ATMEL_SAM_MCK_FREQ_HZ / 8,
 	SOC_ATMEL_SAM_MCK_FREQ_HZ / 32,

From 0b681fad826e3df6ec83d76113e8f01c5efb7cae Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Sun, 22 Dec 2024 17:27:01 +0100
Subject: [PATCH 3/5] dts: bindings: Add Peregine vendor prefix

Add Peregrine Consultoria e Servicos board vendor.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 dts/bindings/vendor-prefixes.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/dts/bindings/vendor-prefixes.txt b/dts/bindings/vendor-prefixes.txt
index aed12fa9adbd..70cbb8fbc2a5 100644
--- a/dts/bindings/vendor-prefixes.txt
+++ b/dts/bindings/vendor-prefixes.txt
@@ -506,6 +506,7 @@ parade	Parade Technologies Inc.
 parallax	Parallax Inc.
 particle	Particle.io
 pda	Precision Design Associates, Inc.
+peregrine	Peregrine Consultoria e Servicos
 pericom	Pericom Technology Inc.
 pervasive	Pervasive Displays, Inc.
 phicomm	PHICOMM Co., Ltd.

From 737b51f7915691df74eb8c6379511de775132b7d Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Tue, 18 Feb 2020 20:40:21 -0300
Subject: [PATCH 4/5] boards: arm: atmel: Add sam4l_wm400_cape board

Initial Version.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 boards/peregrine/index.rst                    |  10 +
 .../sam4l_wm400_cape/Kconfig.defconfig        |  22 ++
 .../sam4l_wm400_cape/Kconfig.sam4l_wm400_cape |   5 +
 boards/peregrine/sam4l_wm400_cape/board.cmake |  12 ++
 boards/peregrine/sam4l_wm400_cape/board.yml   |   6 +
 .../doc/img/wm-400-pin-out.webp               | Bin 0 -> 48598 bytes
 .../peregrine/sam4l_wm400_cape/doc/index.rst  | 153 ++++++++++++++
 .../sam4l_wm400_cape-pinctrl.dtsi             |  60 ++++++
 .../sam4l_wm400_cape/sam4l_wm400_cape.dts     | 189 ++++++++++++++++++
 .../sam4l_wm400_cape/sam4l_wm400_cape.yaml    |  24 +++
 .../sam4l_wm400_cape_defconfig                |  11 +
 11 files changed, 492 insertions(+)
 create mode 100644 boards/peregrine/index.rst
 create mode 100644 boards/peregrine/sam4l_wm400_cape/Kconfig.defconfig
 create mode 100644 boards/peregrine/sam4l_wm400_cape/Kconfig.sam4l_wm400_cape
 create mode 100644 boards/peregrine/sam4l_wm400_cape/board.cmake
 create mode 100644 boards/peregrine/sam4l_wm400_cape/board.yml
 create mode 100644 boards/peregrine/sam4l_wm400_cape/doc/img/wm-400-pin-out.webp
 create mode 100644 boards/peregrine/sam4l_wm400_cape/doc/index.rst
 create mode 100644 boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape-pinctrl.dtsi
 create mode 100644 boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.dts
 create mode 100644 boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.yaml
 create mode 100644 boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape_defconfig

diff --git a/boards/peregrine/index.rst b/boards/peregrine/index.rst
new file mode 100644
index 000000000000..a14270121da6
--- /dev/null
+++ b/boards/peregrine/index.rst
@@ -0,0 +1,10 @@
+.. _boards-peregrine:
+
+Peregrine
+#########
+
+.. toctree::
+   :maxdepth: 1
+   :glob:
+
+   **/*
diff --git a/boards/peregrine/sam4l_wm400_cape/Kconfig.defconfig b/boards/peregrine/sam4l_wm400_cape/Kconfig.defconfig
new file mode 100644
index 000000000000..1f95ae349d08
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/Kconfig.defconfig
@@ -0,0 +1,22 @@
+# Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_SAM4L_WM400_CAPE
+
+if NETWORKING
+
+config IEEE802154_RF2XX
+	default y
+	depends on IEEE802154
+
+endif # NETWORKING
+
+# By default the board uses BOSSA bootloader and require that to zephyr relocate
+# the code_partition. This should be disabled when using the whole flash without
+# bootloader.
+config USE_DT_CODE_PARTITION
+	default y
+
+source "boards/common/usb/Kconfig.cdc_acm_serial.defconfig"
+
+endif # BOARD_SAM4L_WM400_CAPE
diff --git a/boards/peregrine/sam4l_wm400_cape/Kconfig.sam4l_wm400_cape b/boards/peregrine/sam4l_wm400_cape/Kconfig.sam4l_wm400_cape
new file mode 100644
index 000000000000..44f81df5d32d
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/Kconfig.sam4l_wm400_cape
@@ -0,0 +1,5 @@
+# Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_SAM4L_WM400_CAPE
+	select SOC_SAM4LC4B
diff --git a/boards/peregrine/sam4l_wm400_cape/board.cmake b/boards/peregrine/sam4l_wm400_cape/board.cmake
new file mode 100644
index 000000000000..1b805dc8c9f9
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/board.cmake
@@ -0,0 +1,12 @@
+# Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=atsam4lc4b")
+board_runner_args(jlink "--speed=4000")
+board_runner_args(jlink "--reset-after-load")
+board_runner_args(jlink "-rtos GDBServer/RTOSPlugin_Zephyr")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+
+board_runner_args(bossac "--bossac-port=/dev/ttyACM0")
+board_runner_args(bossac "--erase")
+include(${ZEPHYR_BASE}/boards/common/bossac.board.cmake)
diff --git a/boards/peregrine/sam4l_wm400_cape/board.yml b/boards/peregrine/sam4l_wm400_cape/board.yml
new file mode 100644
index 000000000000..ded0ab037ae9
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/board.yml
@@ -0,0 +1,6 @@
+board:
+  name: sam4l_wm400_cape
+  full_name: SAM4L WM-400 Cape Board
+  vendor: peregrine
+  socs:
+    - name: sam4lc4b
diff --git a/boards/peregrine/sam4l_wm400_cape/doc/img/wm-400-pin-out.webp b/boards/peregrine/sam4l_wm400_cape/doc/img/wm-400-pin-out.webp
new file mode 100644
index 0000000000000000000000000000000000000000..28bfe30e3b42467096e407a63e22607735665989
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diff --git a/boards/peregrine/sam4l_wm400_cape/doc/index.rst b/boards/peregrine/sam4l_wm400_cape/doc/index.rst
new file mode 100644
index 000000000000..95ed6d6db5ed
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/doc/index.rst
@@ -0,0 +1,153 @@
+.. zephyr:board:: sam4l_wm400_cape
+
+Overview
+********
+
+The SAM4L WM-400 Cape is a full featured design to enable IEEE 802.15.4 low
+power nodes. It is a Beaglebone Black cape concept with an Atmel AT86RF233
+radio transceiver. User can develop Touch interface and have access to many
+sensors and conectivity buses.
+
+Hardware
+********
+
+- ATSAM4LC4B ARM Cortex-M4 Processor
+- 12 MHz crystal oscillator
+- 32.768 kHz crystal oscillator
+- 1 RS-232 interface
+- 1 RS-485 full duplex interface
+- Micro-AB USB OTG host/device
+- 1 user touch button and One user pushbutton
+- 4 user LEDs
+- 1 AT86RF233 IEEE 802.15.4 transceiver
+- 1 MPL115A2 I²C Barometric Pressure/Temperature Sensor
+- 1 VCNL4010 Proximity/Light Sensor
+- 1 CC2D33S Advanced Humidity Temperature Sensor
+- 1 NCP18WF104J03RB NTC Temperature Sensor
+- 1 TEMT6000X01 Ambient Light Sensor
+
+Supported Features
+==================
+
+The ``sam4l_wm400_cape`` board supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| COUNTER   | on-chip    | counter                             |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| HWINFO    | on-chip    | Unique 120 bit serial number        |
++-----------+------------+-------------------------------------+
+| RADIO     | on-chip    | ieee802154                          |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| TRNG      | on-chip    | entropy                             |
++-----------+------------+-------------------------------------+
+| TWIM      | on-chip    | i2c master port-interrupt           |
++-----------+------------+-------------------------------------+
+| USART     | on-chip    | serial port                         |
++-----------+------------+-------------------------------------+
+| USB       | on-chip    | USB device                          |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not currently supported by Zephyr.
+
+The default configuration can be found in the Kconfig
+:zephyr_file:`boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape_defconfig`.
+
+Connections and IOs
+===================
+
+For detailed information see `SAM4L WM-400 Cape`_ Information.
+
+System Clock
+============
+
+The SAM4L MCU is configured to use the 12 MHz internal oscillator on the board
+with the on-chip PLL to generate an 48 MHz system clock.
+
+Serial Port
+===========
+
+The ATSAM4LC4B MCU has 4 USARTs. One of the USARTs (USART3) is shared between
+RS-232 and RS-485 interfaces. The default console terminal is available at
+RS-232 onboard port or via USB device.
+
+Programming and Debugging
+*************************
+
+The SAM4L WM-400 Cape board has a 10-pin header to connect to a Segger JLink.
+Using the JLink is possible to program and debug the SAM4LC4B chip. The board
+came with a SAM-BA bootloader that only can be used to flash the software.
+
+Flashing
+========
+
+#. For JLink instructions, see :ref:`jlink-debug-host-tools`.
+
+#. Run your favorite terminal program to listen for output. Under Linux the
+   terminal should be :code:`/dev/ttyACM0`. For example:
+
+   .. code-block:: console
+
+      $ minicom -D /dev/ttyACM0 -o
+
+   The -o option tells minicom not to send the modem initialization
+   string. Connection should be configured as follows:
+
+   - Speed: 115200
+   - Data: 8 bits
+   - Parity: None
+   - Stop bits: 1
+
+#. Connect the SAM4L WM-400 Cape board to your host computer using the
+   USB debug port. Then build and flash the :zephyr:code-sample:`hello_world`
+   application.
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: sam4l_wm400_cape
+      :goals: build flash
+
+   You should see ``Hello World! sam4l_wm400_cape`` in your terminal.
+
+#. For SAM-BA bootloader instructions, see :ref:`atmel_sam_ba_bootloader`.
+
+#. Connect the SAM4L WM-400 Cape board to your host computer using the
+   USB debug port pressing the S1 button. Then build and flash the
+   :zephyr:code-sample:`hello_world` application. After programming the board
+   the application will start automatically.
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: sam4l_wm400_cape
+      :goals: build flash
+      :flash-args: -r bossac
+
+
+Debugging
+=========
+
+You can debug an application in the usual way.  Here is an example for the
+:zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: sam4l_wm400_cape
+   :maybe-skip-config:
+   :goals: debug
+
+References
+**********
+
+.. target-notes::
+
+.. _SAM4L WM-400 Cape:
+    https://gfbudke.wordpress.com/2014/04/30/modulo-wireless-ieee-802-15-4zigbee-wm-400-e-wm-400l-bbbs
diff --git a/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape-pinctrl.dtsi b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape-pinctrl.dtsi
new file mode 100644
index 000000000000..e1b81485b5bd
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape-pinctrl.dtsi
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2022-2025 Gerson Fernando Budke <nandojve@gmail.com>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/sam4lcXb-pinctrl.h>
+
+&pinctrl {
+	spi0_default: spi0_default {
+		group1 {
+			pinmux = <PA21A_SPI_MISO>,
+				 <PA22A_SPI_MOSI>,
+				 <PA23A_SPI_SCK>,
+				 <PA13C_SPI_NPCS1>,
+				 <PA14C_SPI_NPCS2>;
+		};
+	};
+
+	twi1_default: twi1_default {
+		group1 {
+			pinmux = <PB1A_TWIMS1_TWCK>,
+				 <PB0A_TWIMS1_TWD>;
+		};
+	};
+
+	usart0_default: usart0_default {
+		group1 {
+			pinmux = <PB14A_USART0_RXD>,
+				 <PB15A_USART0_TXD>;
+		};
+	};
+
+	usart0_hw_ctrl_flow: usart0_hw_ctrl_flow {
+		group1 {
+			pinmux = <PB14A_USART0_RXD>,
+				 <PB12A_USART0_RTS>;
+			bias-pull-up;
+		};
+
+		group2 {
+			pinmux = <PB15A_USART0_TXD>,
+				 <PB11A_USART0_CTS>,
+				 <PB13A_USART0_CLK>;
+		};
+	};
+
+	usart1_default: usart1_default {
+		group1 {
+			pinmux = <PA15A_USART1_RXD>,
+				 <PA16A_USART1_TXD>;
+		};
+	};
+
+	usbc_default: usbc_default {
+		group1 {
+			pinmux = <PA25A_USBC_DM>,
+				 <PA26A_USBC_DP>;
+		};
+	};
+};
diff --git a/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.dts b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.dts
new file mode 100644
index 000000000000..5f1811003449
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.dts
@@ -0,0 +1,189 @@
+/*
+ * Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <atmel/sam4lx4.dtsi>
+#include "sam4l_wm400_cape-pinctrl.dtsi"
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "Atmel SAM4L WM-400 Cape Board with an Atmel SAM4LC4B SoC";
+	compatible = "peregrine,sam4l_wm400_cape", "atmel,sam4lc4b", "atmel,sam4l";
+
+	aliases {
+		i2c-0 = &twim1;
+		led0 = &red_mod_led;
+		led1 = &green_mod_led;
+		led2 = &blue_mod_led;
+		led3 = &red_cape_led;
+		sw0 = &sw0_dfu;
+	};
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition= &code_partition;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		red_mod_led: led_0 {
+			gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
+			label = "LED_0";
+		};
+
+		green_mod_led: led_1 {
+			gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
+			label = "LED_1";
+		};
+
+		blue_mod_led: led_2 {
+			gpios = <&gpiob 7 GPIO_ACTIVE_LOW>;
+			label = "LED_2";
+		};
+
+		red_cape_led: led_3 {
+			gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
+			label = "LED_3";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		sw0_dfu: button_1 {
+			gpios = <&gpiob 3 (GPIO_ACTIVE_LOW)>;
+			label = "SW0_DFU";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <48000000>;
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			label = "sam-ba";
+			reg = <0x000000000 0x00004000>;
+		};
+
+		code_partition: partition@4000 {
+			label = "image";
+			reg = <0x00004000 0x0003c000>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	pinctrl-0 = <&spi0_default>;
+	pinctrl-names = "default";
+
+	cs-gpios = <&gpioa 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)
+		    &gpioa 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+
+	rf2xx@0 {
+		compatible = "atmel,rf2xx";
+		reg = <0x0>;
+		spi-max-frequency = <6000000>;
+		irq-gpios = <&gpioa 20 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
+		reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>;
+		slptr-gpios = <&gpioa 9 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	at45db: at45db081d@1 {
+		compatible = "atmel,at45";
+		reg = <1>;
+		spi-max-frequency = <8000000>;
+		jedec-id = [1f 25 00];
+		size = <8388608>;
+		sector-size = <65536>;
+		block-size = <2048>;
+		page-size = <256>;
+		enter-dpd-delay = <3000>;
+		exit-dpd-delay = <35000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			storage_partition: partition@0 {
+				label = "storage";
+				reg = <0x00000000 0x00100000>;
+			};
+		};
+	};
+};
+
+&tc0 {
+	clk = <4>;
+	status = "okay";
+};
+
+&twim1 {
+	status = "okay";
+
+	pinctrl-0 = <&twi1_default>;
+	pinctrl-names = "default";
+
+	std-clk-slew-lim = <0>;
+	std-clk-strength-low = "0.5";
+	std-data-slew-lim = <0>;
+	std-data-strength-low = "0.5";
+
+	hs-clk-slew-lim = <0>;
+	hs-clk-strength-high = "0.5";
+	hs-clk-strength-low = "0.5";
+	hs-data-slew-lim = <0>;
+	hs-data-strength-low = "0.5";
+
+	hs-master-code = <0>;
+
+	eeprom1: eeprom@57 {
+		compatible = "atmel,at24";
+		reg = <0x57>;
+		size = <32768>;
+		pagesize = <64>;
+		address-width = <16>;
+		timeout = <5>;
+	};
+};
+
+&usart0 {
+	status = "okay";
+	current-speed = <115200>;
+
+	pinctrl-0 = <&usart0_default>;
+	pinctrl-names = "default";
+};
+
+&usart1 {
+	status = "okay";
+	current-speed = <115200>;
+
+	pinctrl-0 = <&usart1_default>;
+	pinctrl-names = "default";
+};
+
+zephyr_udc0: &usbc {
+	status = "okay";
+
+	pinctrl-0 = <&usbc_default>;
+	pinctrl-names = "default";
+};
+
+#include <../boards/common/usb/cdc_acm_serial.dtsi>
diff --git a/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.yaml b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.yaml
new file mode 100644
index 000000000000..ac9516c9431f
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape.yaml
@@ -0,0 +1,24 @@
+# Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: sam4l_wm400_cape
+name: SAM4L WM-400 Cape
+type: mcu
+arch: arm
+flash: 256
+ram: 32
+toolchain:
+  - zephyr
+supported:
+  - counter
+  - gpio
+  - entropy
+  - hwinfo
+  - i2c
+  - ieee802154
+  - spi
+  - uart
+  - usart
+  - usb_device
+  - watchdog
+vendor: peregrine
diff --git a/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape_defconfig b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape_defconfig
new file mode 100644
index 000000000000..623c83b1e063
--- /dev/null
+++ b/boards/peregrine/sam4l_wm400_cape/sam4l_wm400_cape_defconfig
@@ -0,0 +1,11 @@
+# Copyright (c) 2020-2025 Gerson Fernando Budke <nandojve@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_ARM_MPU=y
+CONFIG_HW_STACK_PROTECTION=y
+CONFIG_CORTEX_M_SYSTICK=y
+CONFIG_WDT_DISABLE_AT_BOOT=y
+
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y

From 6579c5c9d53fd7ae647979b57e4632dc008720d8 Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <nandojve@gmail.com>
Date: Tue, 28 Jan 2025 16:25:35 +0100
Subject: [PATCH 5/5] MAINTAINERS.yml: Add Peregrine platform

Add Peregrine platform related to boards/peregrine.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
---
 MAINTAINERS.yml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS.yml b/MAINTAINERS.yml
index e08fe8de0041..7ed10b75ee86 100644
--- a/MAINTAINERS.yml
+++ b/MAINTAINERS.yml
@@ -5565,6 +5565,15 @@ Random:
   labels:
     - "area: Random"
 
+Peregrine Platforms:
+  status: maintained
+  maintainers:
+    - nandojve
+  files:
+    - boards/peregrine/
+  labels:
+    - "platform: Peregrine"
+
 # This area is to be converted to a subarea
 Testing with Renode:
   status: odd fixes