arch: arm: Cortex CM0+ with CMSIS_6 fails to build

[sgfeniex]

Describe the bug

Failure to build because CMSIS5 and CMSIS6 name these registers differently for CM0+. The PR below doesn't account for the CMSIS6 naming.

Regression

[x] This is a regression.

Steps to reproduce

Build an application for CM0+ using CMSIS_6

Relevant log output

/home/runner/work/x/x/zephyr/arch/arm/core/cortex_m/scb.c: In function 'z_arm_save_scb_context':
/home/runner/work/x/x/zephyr/arch/arm/core/cortex_m/scb.c:37:25: error: 'SCB_Type' has no member named 'SHP'; did you mean 'SHPR'?
   37 | #define SHPR_FIELD_NAME SHP
      |                         ^~~
/home/runner/work/x/x/zephyr/arch/arm/core/cortex_m/scb.c:194:62: note: in expansion of macro 'SHPR_FIELD_NAME'
  194 |         volatile uint32_t *shpr = (volatile uint32_t *) SCB->SHPR_FIELD_NAME;
      |                                                              ^~~~~~~~~~~~~~~

Impact

Showstopper – Prevents release or major functionality; system unusable.

Environment

OS : Ubuntu 22.04
Toolchain : zephyr

Extra

@msmttchr ⚠️ CMSIS calls it SHPR on CM0+

https://github.com/ARM-software/CMSIS_6/blob/964440d18a57985e59db64914569ad13dac07c32/CMSIS/Core/Include/core_cm0plus.h#L356-L371

Originally posted by @sgfeniex in a90a47b

Ref #93161

[msmttchr]

I am not sure how to build using cmsis 6, could you please provide some instructions?
I think the problem is linked to the fact that SHP has been renamed to SHPR.

[mathieuchopstm]

#93699

[pdgendt]

@sgfeniex please use the bug issue template.

[sgfeniex]

@pdgendt The reason we got here is that I used the GH UI to create an issue from the diff lines context menu.

I will do my best to port this issue to the template. I don't see a way to apply a template after the fact. Thanks for reminding me. It is surprisingly unstructured without a template.