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I'm trying to use DMA-enabled SPI on an STM32U585 in peripheral (i.e., slave) mode.
The code works in non-DMA mode (i.e., I don't enable CONFIG_SPI_STM32_DMA, and I don't enable gpdma1 and don't add dmas in my overlay file).
But when I enable DMA, I get a hang inside "transceive_dma" in "ll_func_spi_dma_busy" (which just calls "LL_SPI_IsActiveFlag_TXC", which just checks the status of the SPI_SR_TXC bit). Basically, the SPI_SR_TXC appears to be "stuck" in a busy state (zero, according to reference manual -- it goes to 1 when done).
Interestingly enough, there's an errata for a SIMILAR problem on earlier silicon (this is an STM32 U5 series, which uses the H7-series SPI implementation).
CONFIG_SPI_STM32_ERRATA_BUSY is not allowed (i.e., I can't enable it in my conf file) for the STM32 U5 series, but if I modify the spi_ll_stm32.c file to force it to be defined:
Then the code "works" although it seems like it has a performance impact on my system (the SPI I/O thread is a cooperative thread).
But I haven't seen ANY information that indicates this should be necessary on this version of silicon?
This is on a custom board, and unfortunately, the SPI pins are not exposed so getting a logic analyzer trace is not really in the works for someone with my skill.
A final note -- there's no use of CS. It's controlled by the master anyway, but in my case, this is the only peripheral on this SPI bus. I call "transceive_dma", and it starts the DMA operation, and because it's in peripheral mode, "wait_dma_rx_tx_done" will sleep forever until the DMA interrupt fires.
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Hi.
I'm trying to use DMA-enabled SPI on an STM32U585 in peripheral (i.e., slave) mode.
The code works in non-DMA mode (i.e., I don't enable CONFIG_SPI_STM32_DMA, and I don't enable gpdma1 and don't add dmas in my overlay file).
But when I enable DMA, I get a hang inside "transceive_dma" in "ll_func_spi_dma_busy" (which just calls "LL_SPI_IsActiveFlag_TXC", which just checks the status of the SPI_SR_TXC bit). Basically, the SPI_SR_TXC appears to be "stuck" in a busy state (zero, according to reference manual -- it goes to 1 when done).
Interestingly enough, there's an errata for a SIMILAR problem on earlier silicon (this is an STM32 U5 series, which uses the H7-series SPI implementation).
CONFIG_SPI_STM32_ERRATA_BUSY is not allowed (i.e., I can't enable it in my conf file) for the STM32 U5 series, but if I modify the spi_ll_stm32.c file to force it to be defined:
Then the code "works" although it seems like it has a performance impact on my system (the SPI I/O thread is a cooperative thread).
But I haven't seen ANY information that indicates this should be necessary on this version of silicon?
This is on a custom board, and unfortunately, the SPI pins are not exposed so getting a logic analyzer trace is not really in the works for someone with my skill.
The relevant portions of my overlay are:
A final note -- there's no use of CS. It's controlled by the master anyway, but in my case, this is the only peripheral on this SPI bus. I call "transceive_dma", and it starts the DMA operation, and because it's in peripheral mode, "wait_dma_rx_tx_done" will sleep forever until the DMA interrupt fires.
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