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Are there plans to support Infineon's Tricore architecture? The MCU's ASIL rating goes up to ASIL-D and Infineon is a very popular choice for automotive MCUs, so it seems like a great fit considering Zephyr is targeting ASIL-D. |
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Replies: 20 comments 58 replies
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Bump, any update on this? |
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@ilanbiala no plans currently however, we would consider any contributions supporting this architecture. |
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@ilanbiala I have a received xmc4000 based development board today. I will start working on this for Zephyr support. I will be able to start for Tricore after this. |
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Please submit a Pull Request |
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@parthitce just wanted to see if you ever got a chance to work on Tricore support? |
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@ilanbiala Yes I did ported the arch parts of the Zephyr with the help of Aurix 2x ISA. But the board which I have from Infineon is based on Aurix 3x and it's not straight forward with the ISA for 3x series. I had to go via various NDA process which is almost done and waiting for Infineon to release the ISA in their collaborative platform. IFX HAL is BSD licensed in general, but am still not sure about the open sourcing the IFX based in 3x. But HAL for 2x is possible. So the SoC porting is yet to be done and waiting for the ISA and license clearance from Infineon. I used the Toolchain from hightech (close sourced), but there is also an attempt to port the GCC backend for tricore from my end. GCC backend work is posted here: https://github.com/parthitce/gcc, but it's long way to go. I will push the WIP tree for tricore Zephyr port once I get the license clearance from Infineon. |
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Awesome @parthitce, glad to hear that things are at least progressing! Any easy way to follow what's going on? |
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@parthitce Do you share the ported parts? |
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@mgiaco But in short, Linumiz and I myself handling this. |
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Hey, whats the status on the tricore port? I have quite some experience with the tc3xx devices and a few boards to hand. I just saw one commit in the branche there. |
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Is there any update on this? |
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Is there any update on this? |
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No immediate plans |
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Hey, I startet the work to add Support for tricore Architecture. I'm able to Boot my tc37 and context switching is mostly done. Irq and gpio are next. Then I'll publish what I have, but the rest is up for debate. |
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Hi @go2sh that sounds promising. I have a TC37AED board here I'd be interested in using with Zephyr (https://www.infineon.com/cms/en/product/promopages/AURIX-microcontroller-boards/application-boards/secure-ethernet-gateway/). |
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Hey, I'm currently checking on how to publish my results with my employer. I'm actually done with all the required drivers and arch support. |
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That would be great. For our project we’re using gcc 11. Currently I run it via wine after extracting it from ADS, but I’ve just built tricore-gcc 11 for Linux and will switch to that if there are no issues. |
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Can you write me an email christoph.seitz@infineon.com (also in german) and we can set up a meeting. I'm interested in your use case and then we can discuss how we can support you. |
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I'd be super interested in this as well. I have quite a lot of hardware to test with. Would you be able to share your work privately? I might be able to help with some development. |
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I found nuttx has tricore support nuttx_tricore |
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Very cool! |
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You find the current progress under: https://github.com/go2sh/zephyr/tree/tricore Supported boards: Current compilers supported are: CMake options for gcc are: CMake options for clang are: |
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Quick update, Infineon did share the Linux version of the DAS service, I haven't been able to get it to work sadly. It uses some out of band ftdi library instead of the linux ttyUSB system, so you have to do a little dance to prevent linux from grabbing the device in order for the ftdi library to find it. |
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@photex could you share the link? In the end I just setup a windows machine on my network and created a remote access through VSCode+SSH to improve a bit my developer experience |
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https://softwaretools.infineon.com/tools/com.ifx.tb.tool.infineontoolaccesssockettas 8.0.5 is available for Linux. |
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Thank you @photex , I was able to install and started to pick some traces of what is going on inside of this TAS runtime, if I find something useful I'll comeback here to share. |
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Do you still plan to publish? |
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@go2sh @photex did you face this error before when building tricore gcc from sources: I also tried to disable the multilib without success. |
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Can you check if the Board file mentioned is there? Maybe there is some spelling error. Deleting the cmake cache and zephyr cache might help as well. |
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@go2sh @uLipe looks like I might have ran something out of order... started from scratch and I can get further in the build. Thanks for the help! I'm now getting the following: Still looking into it but figured I would ask in case any one else hit it. |
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Hey @cperkulator , sorry for the late response, I was in a hurry at my work. I faced the same problem as you, doing a clean rebuild resolved this issue. I don't see what is behind of such problem. |
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I'm experiencing the same issue as @cperkulator. I'm trying to reproduce the issue under GDB like this: This is the backtrace I get when linkink zephyr kernel: This is the portion of code that fails: static void
lang_memory_set_current(lang_memory_region_type *r, bfd_vma dot)
{
lang_memory_region_mirror_list *l;
lang_memory_region_mirror *gr;
bfd_vma offset;
r->current = dot;
offset = dot - r->origin;
for (l = r->mirror; l; l = l->next)
{
for (gr = l->mirror; gr; gr = gr->next)
{
/* do not set backward
if one region is in multiple groups the DOT may have been
increased due to an allocation in one of the other regions
*/
if (gr->region->current < (offset + gr->region->origin) )
gr->region->current = offset + gr->region->origin;
}
}
}This is a piece of code added in EEESlab/tricore-binutils-gdb@78991a3 to support linking for Tricore architecture. After a quick and not-so detailed look, it seems that the linker espects the ROM memory region to have a mirror, which is actually not initialized, and the dereference of an invalid pointer causes the Segmentation fault. Maybe the problem is in the tricore LD linker script provided by @go2sh , but I'm not an expert and could be wrong For me, doing a clean build does not solve the issue. PS. If it's useful to someone, I added Github Actions to build and release tricore-elf-gcc executables for both windows and linux in my fork: https://github.com/NoMore201/tricore-gcc-toolchain/tree/main You can find last build in the Release section |
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UPDATE: after a more detailed look, it seems that this PR fixed the above mentioned Segmentation Fault: EEESlab/tricore-binutils-gdb@2283fc7. The problems is that struct |
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Hello guys, is there already support of ZEPHYR for Infineon Aurix device (TC37xx, TC36xx)? |
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See the comment below. NDA is the main point for TC4 support. Customers with NDA can get access to it. |
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Please email me to: ak.alexander.kozhinov@gmail.com |
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@go2sh I suppose the foundation already made can be used as well for supporting the TC27x, right? They are the target chip I'm using currently. |
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Sure, I think there could be a lot of reuse happening. But I have never worked with tc2. :) |
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Great to hear, currently I'm tweaking your branch to get it working to the TC27x evaluation board I have in hands, I think it is time to add proper device tree for this soc even though is very minimal, are you generated the dts files for the TC3 target using any automation script or by just using the information from the reference manual? Thank you. |
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btw what tools to be used? |
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I don't think it can be built with the TASKING compiler, used by AURIX development studio. You need a GCC/Clang compiler. Personally I used the open source tricore-elf-gcc EEESlab/tricore-gcc-toolchain-11.3.0. You can build the compiler yourself, or grab a pre-built bundle from my fork: https://github.com/NoMore201/tricore-gcc-toolchain/releases. Check out Zephyr getting started guide and this comment for further information #68826 (comment) |
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Are you assuming to add the TriCore Aurix port as official ZEPHYR clone and supported board ? |
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As a general status:
|
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This sounds great. Do you have any Time-Line estimation, when official merge of such changes into main Zephyr branch could happen? |
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Let me check next week, if the interest is so high. The internal progress is along way from what is public. The main line work will take some time. |
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It would be great if they made the work on it public. |
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@cperkulator I hope too, but having worked with Infineon MCUs in the latest years, Infineon doesn't seem to be the kind of company to easily share its work to the public under an open license. Happy to be proven wrong of course. |
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@go2sh how is the port going? I should have some free time the next couple weeks to test things out. |
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No immediate plans