STM32H747i-disco board: DMA mode causes littleFS failure when using SD card driver. #64092
Replies: 3 comments 14 replies
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@coran21, as you introduced idma, is this something that you've came across? |
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@coran21 cc: @erwango there are multiple reason for using LittleFS. Power loss resilience is one. Other is Dynamic wear levelling. Both are important for us. I understand that both these features are lacking in FAT FS. We may be able to do something about power failure resilience, dynamic wear levelling is important. Is that supported in FAT FS? I believe not. But the performance of 0.7s vs 10s is really compelling to use FAT FS. I see this issue is raised by others and there are some solutions suggested to do erase of block in a idle task to speed up writes. So, do you know if there is any work ongoing to improve performance of LittleFS? |
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@coran21 cc: @erwango regarding idma support, could you tell me if in your platform you have DCACHE enabled/disabled. Wondering how it works with DMA when there is caching enabled. I am just running the littleFS sample application. |
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We chose SD Card because of the wear leveling. I would say that every SD card has already implemented a wear-leveling mechanism, which is much better than what can provide LittleFS. Search for SD Card wear-leveling. We are using an industrial SD card, which should have an even better wear-leveling mechanism. |
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@mkaricheri No, STM32L4 is based on Cortex-M4, and has no cache. I think the driver needs to be modified to support idma with the cache. |
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@coran21 Thanks for the information. Yes, I have checked and my eMMC part is an industrial part and support wear levelling. So, we might be able to use FAT FS as well with greater performance. |
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@coran21 cc: @erwango Yes that explains why it works. @erwango when you get a chance, could you please check if changes I did to the SD card driver is doing the cache maintenance operation correctly? Perhaps the cache maintenance operations are not implemented on STM32H747? |
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@erwango @coran21 I could implement a fix for the issue using correct cache maintenance API which SCB* APIs not the one I used earlier. With this the littleFS is happy. Please review this and potentially test it if you can. I am new to the process here as to what is needed to send an official PR. I will read through the procedure on contribution. There are lots of steps discussed there. For this change could you please suggest the minimal set of checklist send a PR. Here is the commit on my github repo. |
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@mkaricheri changes looks sufficiently good to start a review (we'll discuss details during the review). Just go ahead ! |
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@erwango On further testing of this change, I find a BUS fault at the end of main when it calls fs_write() or fs_close() as below. So this is not yet ready for a PR. If you would like, I can send commit for adding sample application support without dma and then later send another PR for the DMA support, Do you now why the bus fault in the DMA case? I will disable DMA and test if is related to DMA or not `5b aa aa aa aa aa aa aa 5c aa aa aa aa aa aa aa 61 aa aa aa aa aa aa aa 62 aa aa aa aa aa aa aa |
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The branch is ready except for the above issue. Last 2 commits on https://github.com/mkaricheri/zephyr/commits/latest/stm32h747i-disco-sdmmc-dma-support If you can try this on a 747i-disco board and see if the above issue is reproduced, that will be great. It would take me a while to root cause, but if you could provide some hint, I can try out. Meanwhile I will send the first commit for review as it is independent of DMA fix |
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@erwango do you have any insight into the BUS fault I see in the branch when dma is enabled for SDMMC. We would like to enable this for a potential throughput improvement and wondering how to resolve this bus fault. |
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Hello Experts,
I am new to this community and I was directed to discuss the issue I am seeing in this forum. So please bear with me if something not done right. Your suggestion to do this right welcome!
I was able to get SD Card driver work successfully in Interrupt mode on STM32H747i-disco board that I have. The recent v3.4.0 release have idma property added to enable the driver to use internal DMA. When I try to enable idma in the DT node for sdmmc and booted the image on STM32H747i-disco board, I get the below error message. I have tried with 2 different SD card and the same results. Without idma, this works fine. That log for this is also provided below for your information. On STM32H745i-disco, with eMMC device also, I get similar results. Looks like there is some issue with the sdmmc driver using internal dma.
DT node overlay for littleFS attached below
With idma property set in the sdmmc dt node
I: FS at SDMMC: is 31116288 0x200-byte blocks with 512 cycle I: sizes: rd 512 ; pr 512 ; ca 512 ; la 2048 ~$ E: WEST_TOPDIR/modules/fs/littlefs/lfs.c:1234: Corrupted dir pair at {0x0, 0x1} W: can't mount (LFS -84); formatting W: WEST_TOPDIR/modules/fs/littlefs/lfs.c:1897: Superblock 0x0 has become unwritable E: format failed (LFS -28) E: fs mount error (-28)Without idma property (Interrupt)
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*** Booting Zephyr OS build v3.4.0-rc1-540-g5f216aeedf55 ***
Sample program to r/w files on littlefs
I: LittleFS version 2.5, disk version 2.0
uart:I: FS at SDMMC: is 31116288 0x200-byte blocks with 512 cycle
I: sizes: rd 512 ; pr 512 ; ca 512 ; la 2048
~$ E: WEST_TOPDIR/modules/fs/littlefs/lfs.c:1234: Corrupted dir pair at {0x0, 0x1}
W: can't mount (LFS -84); formatting
I: /SDMMC: mounted
/SDMMC:: bsize = 512 ; frsize = 512 ; blocks = 31116288 ; bfree = 31116286
Listing dir /SDMMC: ...
/SDMMC:/boot_count read count:0 (bytes: 0)
/SDMMC:/boot_count write new boot count 1: [wr:1]
I: Test file: /SDMMC:/pattern.bin not found, create one!
------ FILE: /SDMMC:/pattern.bin ------
01 55 55 55 55 55 55 55 02 55 55 55 55 55 55 55
03 55 55 55 55 55 55 55 04 55 55 55 55 55 55 55
05 55 55 55 55 55 55 55 06 55 55 55 55 55 55 55
07 55 55 55 55 55 55 55
08 55 55 55 55 55 55 55
09 55 55 55 55 55 55 55 0a 55 55 55 55 55 55 55
0b 55 55 55 55 55 55 55 0c 55 55 55 55 55 55 55
0d 55 55 55 55 55 55 55 0e 55 55 55 55 55 55 55
0f 55 55 55 55 55 55 55 10 55 55 55 55 55 55 55
11 55 55 55 55 55 55 55 12 55 55 55 55 55 55 55
13 55 55 55 55 55 55 55 14 55 55 55 55 55 55 55
15 55 55 55 55 55 55 55 16 55 55 55 55 55 55 55
17 55 55 55 55 55 55 55 18 55 55 55 55 55 55 55
19 55 55 55 55 55 55 55 1a 55 55 55 55 55 55 55
1b 55 55 55 55 55 55 55 1c 55 55 55 55 55 55 55
1d 55 55 55 55 55 55 55 1e 55 55 55 55 55 55 55
1f 55 55 55 55 55 55 55 20 55 55 55 55 55 55 55
21 55 55 55 55 55 55 55 22 55 55 55 55 55 55 55
23 55 55 55 55 55 55 55 24 55 55 55 55 55 55 55
25 55 55 55 55 55 55 55 26 55 55 55 55 55 55 55
27 55 55 55 55 55 55 55 28 55 55 55 55 55 55 55
29 55 55 55 55 55 55 55 2a 55 55 55 55 55 55 55
2b 55 55 55 55 55 55 55 2c 55 55 55 55 55 55 55
2d 55 55 55 55 55 55 55 2e 55 55 55 55 55 55 55
2f 55 55 55 55 55 55 55 30 55 55 55 55 55 55 55
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35 55 55 55 55 55 55 55 36 55 55 55 55 55 55 55
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39 55 55 55 55 55 55 55 3a 55 55 55 55 55 55 55
3b 55 55 55 55 55 55 55 3c 55 55 55 55 55 55 55
3d 55 55 55 55 55 55 55 3e 55 55 55 55 55 55 55
3f 55 55 55 55 55 55 55 40 55 55 55 55 55 55 55
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45 55 aa
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