tests: drivers: uart: async_api: support DCache with nocache memory

Add support for running tests with DCache enabled & put DMA buffers
in a nocache memory region to avoid coherency issues.

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>

Author: ajarmouni-st

tests/drivers/uart/uart_async_api/Kconfig

@@ -0,0 +1,21 @@
+# Copyright (c) 2024 STMicroelectronics
+#
+# SPDX-License-Identifier: Apache-2.0
+
+mainmenu "UART Async Test"
+
+source "Kconfig.zephyr"
+
+if DCACHE
+
+config DT_DEFINED_NOCACHE
+	bool "Enable this if a nocache region is defined in devicetree"
+
+if DT_DEFINED_NOCACHE
+
+config DT_DEFINED_NOCACHE_NAME
+	string "Name of the nocache region defined in devicetree (uppercase)"
+
+endif # DT_DEFINED_NOCACHE
+
+endif # DCACHE

tests/drivers/uart/uart_async_api/src/test_uart_async.c

@@ -1,11 +1,22 @@
 /*
- *  Copyright (c) 2019 Nordic Semiconductor ASA
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ * Copyright (c) 2024 STMicroelectronics
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
 #include "test_uart.h"
 
+#if defined(CONFIG_DCACHE) && defined(CONFIG_DT_DEFINED_NOCACHE)
+#define __NOCACHE	__attribute__ ((__section__(CONFIG_DT_DEFINED_NOCACHE_NAME)))
+#define NOCACHE_MEM 1
+#elif defined(CONFIG_DCACHE) && defined(CONFIG_NOCACHE_MEMORY)
+#define __NOCACHE	__nocache
+#define NOCACHE_MEM 1
+#else
+#define NOCACHE_MEM 0
+#endif /* CONFIG_NOCACHE_MEMORY */
+
 K_SEM_DEFINE(tx_done, 0, 1);
 K_SEM_DEFINE(tx_aborted, 0, 1);
 K_SEM_DEFINE(rx_rdy, 0, 1);
@@ -79,14 +90,18 @@ static void uart_async_test_init(void)
 
 struct test_data {
 	volatile uint32_t tx_aborted_count;
-	uint8_t rx_first_buffer[10];
+	__aligned(32) uint8_t rx_first_buffer[10];
 	uint32_t recv_bytes_first_buffer;
-	uint8_t rx_second_buffer[5];
+	__aligned(32) uint8_t rx_second_buffer[5];
 	uint32_t recv_bytes_second_buffer;
 	bool supply_second_buffer;
 };
 
+#if NOCACHE_MEM
+static struct test_data tdata __used __NOCACHE;
+#else
 ZTEST_BMEM struct test_data tdata;
+#endif /* NOCACHE_MEM */
 
 static void test_single_read_callback(const struct device *dev,
 			       struct uart_event *evt, void *user_data)
@@ -308,8 +323,13 @@ ZTEST_USER(uart_async_multi_rx, test_multiple_rx_enable)
 	tdata_check_recv_buffers(tx_buf, sizeof(tx_buf));
 }
 
+#if NOCACHE_MEM
+static __aligned(32) uint8_t chained_read_buf[2][8] __used __NOCACHE;
+static __aligned(32) uint8_t chained_cpy_buf[10] __used __NOCACHE;
+#else
 ZTEST_BMEM uint8_t chained_read_buf[2][8];
 ZTEST_BMEM uint8_t chained_cpy_buf[10];
+#endif /* NOCACHE_MEM */
 ZTEST_BMEM volatile uint8_t rx_data_idx;
 ZTEST_BMEM uint8_t rx_buf_idx;
 
@@ -358,7 +378,11 @@ static void *chained_read_setup(void)
 
 ZTEST_USER(uart_async_chain_read, test_chained_read)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t tx_buf[10] __used __NOCACHE;
+#else
 	uint8_t tx_buf[10];
+#endif /* NOCACHE_MEM */
 	int iter = 6;
 	uint32_t rx_timeout_ms = 50;
 	int err;
@@ -390,7 +414,11 @@ ZTEST_USER(uart_async_chain_read, test_chained_read)
 		      "RX_DISABLED timeout");
 }
 
+#if NOCACHE_MEM
+static __aligned(32) uint8_t double_buffer[2][12] __used __NOCACHE;
+#else
 ZTEST_BMEM uint8_t double_buffer[2][12];
+#endif /* NOCACHE_MEM */
 ZTEST_DMEM uint8_t *next_buf = double_buffer[1];
 
 static void test_double_buffer_callback(const struct device *dev,
@@ -431,7 +459,11 @@ static void *double_buffer_setup(void)
 
 ZTEST_USER(uart_async_double_buf, test_double_buffer)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t tx_buf[4] __used __NOCACHE;
+#else
 	uint8_t tx_buf[4];
+#endif /* NOCACHE_MEM */
 
 	zassert_equal(uart_rx_enable(uart_dev,
 				     double_buffer[0],
@@ -456,8 +488,13 @@ ZTEST_USER(uart_async_double_buf, test_double_buffer)
 		      "RX_DISABLED timeout");
 }
 
+#if NOCACHE_MEM
+static __aligned(32) uint8_t test_read_abort_rx_buf[2][100] __used __NOCACHE;
+static __aligned(32) uint8_t test_read_abort_read_buf[100] __used __NOCACHE;
+#else
 ZTEST_BMEM uint8_t test_read_abort_rx_buf[2][100];
 ZTEST_BMEM uint8_t test_read_abort_read_buf[100];
+#endif /* NOCACHE_MEM */
 ZTEST_BMEM int test_read_abort_rx_cnt;
 
 static void test_read_abort_callback(const struct device *dev,
@@ -526,8 +563,13 @@ static void *read_abort_setup(void)
 
 ZTEST_USER(uart_async_read_abort, test_read_abort)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t rx_buf[100] __used __NOCACHE;
+	static __aligned(32) uint8_t tx_buf[100] __used __NOCACHE;
+#else
 	uint8_t rx_buf[100];
 	uint8_t tx_buf[100];
+#endif /* NOCACHE_MEM */
 
 	memset(rx_buf, 0, sizeof(rx_buf));
 	memset(tx_buf, 1, sizeof(tx_buf));
@@ -568,7 +610,11 @@ ZTEST_USER(uart_async_read_abort, test_read_abort)
 
 ZTEST_BMEM volatile size_t sent;
 ZTEST_BMEM volatile size_t received;
+#if NOCACHE_MEM
+static __aligned(32) uint8_t test_rx_buf[2][100] __used __NOCACHE;
+#else
 ZTEST_BMEM uint8_t test_rx_buf[2][100];
+#endif /* NOCACHE_MEM */
 
 static void test_write_abort_callback(const struct device *dev,
 			       struct uart_event *evt, void *user_data)
@@ -612,7 +658,11 @@ static void *write_abort_setup(void)
 
 ZTEST_USER(uart_async_write_abort, test_write_abort)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t tx_buf[100] __used __NOCACHE;
+#else
 	uint8_t tx_buf[100];
+#endif /* NOCACHE_MEM */
 
 	memset(test_rx_buf, 0, sizeof(test_rx_buf));
 	memset(tx_buf, 1, sizeof(tx_buf));
@@ -681,8 +731,13 @@ static void *forever_timeout_setup(void)
 
 ZTEST_USER(uart_async_timeout, test_forever_timeout)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t rx_buf[100] __used __NOCACHE;
+	static __aligned(32) uint8_t tx_buf[100] __used __NOCACHE;
+#else
 	uint8_t rx_buf[100];
 	uint8_t tx_buf[100];
+#endif /* NOCACHE_MEM */
 
 	memset(rx_buf, 0, sizeof(rx_buf));
 	memset(tx_buf, 1, sizeof(tx_buf));
@@ -715,7 +770,11 @@ ZTEST_USER(uart_async_timeout, test_forever_timeout)
 }
 
 
+#if NOCACHE_MEM
+const uint8_t chained_write_tx_bufs[2][10] = {"Message 1", "Message 2"};
+#else
 ZTEST_DMEM uint8_t chained_write_tx_bufs[2][10] = {"Message 1", "Message 2"};
+#endif /* NOCACHE_MEM */
 ZTEST_DMEM bool chained_write_next_buf = true;
 ZTEST_BMEM volatile uint8_t tx_sent;
 
@@ -761,7 +820,11 @@ static void *chained_write_setup(void)
 
 ZTEST_USER(uart_async_chain_write, test_chained_write)
 {
+#if NOCACHE_MEM
+	static __aligned(32) uint8_t rx_buf[20] __used __NOCACHE;
+#else
 	uint8_t rx_buf[20];
+#endif /* NOCACHE_MEM */
 
 	memset(rx_buf, 0, sizeof(rx_buf));
 
@@ -787,9 +850,15 @@ ZTEST_USER(uart_async_chain_write, test_chained_write)
 		      "RX_DISABLED timeout");
 }
 
+#if NOCACHE_MEM
+static __aligned(32) uint8_t long_rx_buf[1024] __used __NOCACHE;
+static __aligned(32) uint8_t long_rx_buf2[1024] __used __NOCACHE;
+static __aligned(32) uint8_t long_tx_buf[1000] __used __NOCACHE;
+#else
 ZTEST_BMEM uint8_t long_rx_buf[1024];
 ZTEST_BMEM uint8_t long_rx_buf2[1024];
 ZTEST_BMEM uint8_t long_tx_buf[1000];
+#endif /* NOCACHE_MEM */
 ZTEST_BMEM volatile uint8_t evt_num;
 ZTEST_BMEM size_t long_received[2];