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boards: st: add support for stm32mp257f_ev1 board
Introduce initial board support for the STM32MP257F-EV1. This includes: - Board metadata (board.yml, stm32mp257f_ev1.yaml) - Base software configuration (Kconfig.stm32mp257f_ev1) - CMake build integration (board.cmake) - Default configuration (stm32mp257f_ev1_stm32mp257fxx_m33_defconfig) - Minimal device tree (stm32mp257f_ev1_stm32mp257fxx_m33.dts) - Initial documentation and image for the stm32mp257f_ev1 board. - OpenOCD configuration files for debugging support. This enables the STM32MP257F-EV1 board to build and debug a hello world sample. Note that other necessary openocd configuration files are added to the zephyr sdk directory and can be found in the stm-openocd repository[1]. [1]:https://github.com/STMicroelectronics/device-stm-openocd/tree/main Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
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‎boards/st/stm32mp257f_ev1/Kconfig.stm32mp257f_ev1

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# Copyright (C) 2025 Savoir-faire Linux, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_STM32MP257F_EV1
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select SOC_STM32MP2X_M33 if BOARD_STM32MP257F_EV1_STM32MP257FXX_M33

‎boards/st/stm32mp257f_ev1/board.cmake

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# Copyright (C) 2025 Savoir-faire Linux, Inc.
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_BOARD_STM32MP257F_EV1_STM32MP257FXX_M33)
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board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_stm32mp257f_ev1_m33.cfg")
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board_runner_args(openocd "--gdb-init=target extended-remote :3334")
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endif()
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/st/stm32mp257f_ev1/board.yml

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board:
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name: stm32mp257f_ev1
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full_name: STM32MP257F-EV1 Evaluation Board
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vendor: st
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socs:
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- name: stm32mp257fxx

‎boards/st/stm32mp257f_ev1/doc/img/stm32mp257f_ev1.webp

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‎boards/st/stm32mp257f_ev1/doc/index.rst

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.. zephyr:board:: stm32mp257f_ev1
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Overview
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********
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The STM32MP257F-EV1 Evaluation board is designed as a complete demonstration
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and development platform for the STMicroelectronics STM32MP257F microprocessor
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based on Arm |reg| dual-core Cortex |reg|-A35 (1.5 GHz) and Cortex |reg|-M33
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(400 MHz), and the STPMIC25APQR companion chip.
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Zephyr OS is ported to run on the Cortex |reg|-M33 core, as a coprocessor of
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the Cortex |reg|-A35 core.
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Features:
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=========
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- STM32MP257FAI3 microprocessor featuring dual-core Arm |reg| Cortex |reg|-A35,
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a Cortex |reg|-M33 and a Cortex |reg|-M0+ in a TFBGA436 package
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- ST power management STPMIC25APQR
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- Two 16-Gbit DDR4 DRAMs
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- 512-Mbit (64 Mbytes) S-NOR flash memory
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- 32-Gbit (4 Gbytes) eMMC v5.0
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- Three 1-Gbit/s Ethernet (RGMII) with TSN switch compliant with IEEE-802.3ab
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- High-speed USB Host 2-port hub
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- High-speed USB Type-C |reg| DRP
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- Four user LEDs
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- Two user, one tamper, and one reset push-buttons
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- One wake-up button
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- Four boot pin switches
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- Board connectors:
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- Three Ethernet RJ45
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- Two USB Host Type-A
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- USB Type-C |reg|
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- microSD |trade| card holder
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- Mini PCIe
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- Dual-lane MIPI CSI-2 |reg| camera module expansion connector
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- Two CAN FD
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- LVDS
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- MIPI10
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- GPIO expansion connector
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- mikroBUS |trade| expansion connector
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- VBAT for power backup
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- On-board STLINK-V3EC debugger/programmer with USB re-enumeration capability
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Two Virtual COM ports (VCPs), and debug ports (JTAG/SWD)
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- Mainlined open-source Linux |reg| STM32 MPU OpenSTLinux Distribution and
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STM32CubeMP2 software with examples
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- Linux |reg| Yocto project, Buildroot, and STM32CubeIDE as
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development environments
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More information about the board can be found at the
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`STM32MP257F-EV1 website`_.
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Hardware
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********
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Cores:
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======
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- 64-bit dual-core Arm |reg| Cortex |reg|-A35 with 1.5 GHz max frequency
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- 32-Kbyte I + 32-Kbyte D level 1 cache for each Cortex |reg|-A35 core
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- 512-Kbyte unified level 2 cache
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- Arm |reg| NEON |trade| and Arm |reg| TrustZone |reg|
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- 32-bit Arm |reg| Cortex |reg|-M33 with FPU/MPU, Arm |reg| TrustZone |reg|,
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and 400 MHz max frequency
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- L1 16-Kbyte ICache / 16-Kbyte DCache for Cortex |reg|-M33
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- 32-bit Arm |reg| Cortex |reg|-M0+ in SmartRun domain with 200 MHz max
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frequency (up to 16 MHz in autonomous mode)
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Memories:
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=========
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- External DDR memory up to 4 Gbytes
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- Up to DDR3L-2133 16/32-bit
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- Up to DDR4-2400 16/32-bit
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- Up to LPDDR4-2400 16/32-bit
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- 808-Kbyte internal SRAM: 256-Kbyte AXI SYSRAM, 128-Kbyte AXI video RAM or
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SYSRAM extension, 256-Kbyte AHB SRAM, 128-Kbyte AHB SRAM with ECC in backup
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domain, 8-Kbyte SRAM with ECC in backup domain, 32 Kbytes in SmartRun domain
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- Two Octo-SPI memory interfaces
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- Flexible external memory controller with up to 16-bit data bus: parallel
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interface to connect external ICs, and SLC NAND memories with up to 8-bit ECC
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Power
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=====
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- STPMIC25 for voltage regulation (multiple buck/LDO regulators)
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- USB-C or 5V DC jack power input
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- VBAT backup battery connector (RTC, backup SRAM)
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Clock management
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================
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- External oscillators:
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- 32.768 kHz LSE crystal
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- 40 MHz HSE crystal
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- Internal oscillators:
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- 64 MHz HSI oscillator
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- 4 MHz CSI oscillator
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- 32 kHz LSI oscillator
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- Five separate PLLs with integer and fractional mode
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Security/Safety
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===============
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- Secure boot, TrustZone |reg| peripherals, active tamper, environmental
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monitors, display secure layers, hardware accelerators
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- Complete resource isolation framework
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Connectivity
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============
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- 3x Gigabit Ethernet (RGMII, TSN switch capable)
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- 2x CAN FD
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- USB 2.0 High-Speed Host (dual-port)
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- USB Type-C |reg| DRP
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- mikroBUS |trade| expansion
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- GPIO expansion connector
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Display & Camera
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================
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- DSI interface (4-lane)
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- LVDS interface (4-lane)
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- Camera CSI-2 interface (2-lane)
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Debug
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=====
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- STLINK-V3EC (onboard debugger with VCP, JTAG and SWD)
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More information about STM32MP257F can be found here:
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- `STM32MP257F on www.st.com`_
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Connections and IOs
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===================
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STM32MP257F-EV1 Evaluation Board schematic is available here:
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`STM32MP257F-EV1 Evaluation board schematics`_
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System Clock
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============
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Cortex |reg|-A35
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----------------
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Not yet supported in Zephyr.
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Cortex |reg|-M33
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----------------
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The Cortex |reg|-M33 Core is configured to run at a 400 MHz clock speed.
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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Prerequisite
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============
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Before you can run Zephyr on the STM32MP257F-EV1 Evaluation board, you need to
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set up the Cortex |reg|-A35 core with a Linux |reg| environment. The Cortex
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|reg|-M33 core runs Zephyr as a coprocessor, and it requires the Cortex
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|reg|-A35 to load and start the firmware using remoteproc.
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One way to set up the Linux environment is to use the official ST
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OpenSTLinux distribution, following the `Starter Package`_. (more information
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about the procedure can be found in the `STM32MPU Wiki`_)
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Loading the firmware
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====================
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Once the OpenSTLinux distribution is installed on the board, the Cortex |reg|
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-A35 is responsible (in the current distribution) for loading the Zephyr
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firmware image in DDR and/or SRAM and starting the Cortex |reg| -M33 core. The
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application can be built using west, taking the :zephyr:code-sample:`blinky` as
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an example.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32mp257f_ev1/stm32mp257fxx/m33
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:goals: build
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The firmware can be copied to the board file system and started with the Linux
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remoteproc framework. (more information about the procedure can be found in the
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`STM32MP257F boot Cortex-M33 firmware`_)
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Debugging
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=========
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Applications can be debugged using OpenOCD and GDB. The OpenOCD files can be
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found at `device-stm-openocd`_.
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The firmware must first be started by the Cortex |reg|-A35. The debugger can
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then be attached to the running Zephyr firmware using OpenOCD.
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- Build the sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: stm32mp257f_ev1/stm32mp257fxx/m33
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:goals: build
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- Copy the firmware to the board, load it and start it with remoteproc
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(`STM32MP257F boot Cortex-M33 firmware`_). The orange LED should be blinking.
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- Attach to the target:
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.. code-block:: console
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$ west attach
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References
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==========
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.. target-notes::
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.. _STM32MP257F-EV1 website:
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https://www.st.com/en/evaluation-tools/stm32mp257f-ev1.html#overview
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.. _STM32MP257F-EV1 Evaluation board User Manual:
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https://www.st.com/resource/en/user_manual/um3359-evaluation-board-with-stm32mp257f-mpu-stmicroelectronics.pdf
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.. _STM32MP257F-EV1 Evaluation board schematics:
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https://www.st.com/resource/en/schematic_pack/mb1936-mp257f-x-d01-schematic.pdf
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.. _STM32MP25xC/F Evaluation board datasheet:
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https://www.st.com/resource/en/datasheet/stm32mp257c.pdf
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.. _STM32MP257F on www.st.com:
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https://www.st.com/en/microcontrollers-microprocessors/stm32mp257f.html
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.. _STM32MP257F reference manual:
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https://www.st.com/resource/en/reference_manual/rm0457-stm32mp25xx-advanced-armbased-3264bit-mpus-stmicroelectronics.pdf
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.. _STM32MP257F boot Cortex-M33 firmware:
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https://wiki.st.com/stm32mpu/wiki/Linux_remoteproc_framework_overview#Remote_processor_boot_through_sysfs
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.. _Starter Package:
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https://wiki.st.com/stm32mpu/wiki/STM32MP25_Evaluation_boards_-_Starter_Package
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.. _STM32MPU Wiki:
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https://wiki.st.com/stm32mpu/wiki/Main_Page
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.. _device-stm-openocd:
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https://github.com/STMicroelectronics/device-stm-openocd/tree/main

‎boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts

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/*
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* Copyright (C) 2025 Savoir-faire Linux, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/mp2/stm32mp257_m33.dtsi>
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/ {
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model = "STMicroelectronics STM32MP257F-EV1 board";
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compatible = "st,stm32mp257f-ev1", "st,stm32mp25";
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chosen {
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zephyr,flash = &ddr_code;
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zephyr,sram = &ddr_sys;
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};
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};
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&rcc {
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clock-frequency = <DT_FREQ_M(400)>;
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};

‎boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml

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identifier: stm32mp257f_ev1/stm32mp257fxx/m33
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name: STM32MP257F_EV1
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gccarmemb
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supported:
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- LED
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- gpio
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testing:
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ignore_tags:
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- cmsis_rtos_v2
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- net
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- mpu
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- tinycrypt
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- crypto
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- aes
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- cmm
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- shell
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- nfc
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ram: 8192
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flash: 8192
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vendor: st

‎boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33_defconfig

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# Copyright (C) 2025 Savoir-faire Linux, Inc.
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# SPDX-License-Identifier: Apache-2.0
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# Enable MPU
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CONFIG_ARM_MPU=y
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CONFIG_CLOCK_CONTROL=n
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y

‎boards/st/stm32mp257f_ev1/support/openocd_stm32mp257f_ev1_m33.cfg

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# Only enable the Cortex-M33 debugger
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set EN_CA35_0 0
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set EN_CA35_1 0
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set EN_CM33 1
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set EN_CM0P 0
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source [find board/stm32mp25x_dk.cfg]
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# Set active target to Cortex-M33
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targets stm32mp25x.m33

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