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lines changed Original file line number Diff line number Diff line change 3
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add_subdirectory (${ZEPHYR_CURRENT_MODULE_DIR} cmsis )
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- if (CONFIG_CPU_CORTEX_M OR CONFIG_CPU_AARCH32_CORTEX_A OR CONFIG_CPU_AARCH32_CORTEX_R )
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+ if (CONFIG_CPU_AARCH32_CORTEX_A OR CONFIG_CPU_AARCH32_CORTEX_R )
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zephyr_include_directories (. )
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endif ()
Original file line number Diff line number Diff line change @@ -8,7 +8,6 @@ config HAS_CMSIS_CORE
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bool
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select HAS_CMSIS_CORE_A if CPU_AARCH32_CORTEX_A
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select HAS_CMSIS_CORE_R if CPU_AARCH32_CORTEX_R
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- select HAS_CMSIS_CORE_M if CPU_CORTEX_M
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if HAS_CMSIS_CORE
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@@ -18,19 +17,4 @@ config HAS_CMSIS_CORE_A
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config HAS_CMSIS_CORE_R
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bool
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- config HAS_CMSIS_CORE_M
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- bool
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-
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- config CMSIS_M_CHECK_DEVICE_DEFINES
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- bool "Check device defines"
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- default n
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- depends on HAS_CMSIS_CORE_M
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- help
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- This options enables the validation of CMSIS configuration flags.
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-
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- config CMSIS_CORE_HAS_SYSTEM_CORE_CLOCK
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- bool
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- help
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- Enable this option if CMSIS SystemCoreClock symbols is available.
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-
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endif
Original file line number Diff line number Diff line change 6
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#ifndef ZEPHYR_MODULES_CMSIS_CMSIS_H_
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#define ZEPHYR_MODULES_CMSIS_CMSIS_H_
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- #if defined(CONFIG_CPU_CORTEX_M )
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- #include "cmsis_core_m.h"
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- #elif defined(CONFIG_CPU_AARCH32_CORTEX_A ) || defined(CONFIG_CPU_AARCH32_CORTEX_R )
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+ #if defined(CONFIG_CPU_AARCH32_CORTEX_A ) || defined(CONFIG_CPU_AARCH32_CORTEX_R )
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#include "cmsis_core_a_r.h"
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#endif
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Original file line number Diff line number Diff line change
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+ # Copyright (c) 2023 Nordic Semiconductor ASA
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+ # Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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+ # SPDX-License-Identifier: Apache-2.0
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+
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+ add_subdirectory (${ZEPHYR_CURRENT_MODULE_DIR} cmsis_6 )
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+
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+ if (CONFIG_CPU_CORTEX_M )
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+ zephyr_include_directories (. )
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+ endif ()
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+ # Copyright (c) 2016 Intel Corporation
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+ # Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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+ # SPDX-License-Identifier: Apache-2.0
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+
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+ config ZEPHYR_CMSIS_6_MODULE
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+ bool
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+
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+ config HAS_CMSIS_CORE
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+ bool
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+ select HAS_CMSIS_CORE_M if CPU_CORTEX_M
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+
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+ if HAS_CMSIS_CORE
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+
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+ config HAS_CMSIS_CORE_M
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+ bool
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+
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+ config CMSIS_M_CHECK_DEVICE_DEFINES
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+ bool "Check device defines"
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+ depends on HAS_CMSIS_CORE_M
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+ help
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+ This options enables the validation of CMSIS configuration flags.
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+
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+ config CMSIS_CORE_HAS_SYSTEM_CORE_CLOCK
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+ bool
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+ help
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+ Enable this option if CMSIS SystemCoreClock symbols is available.
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+
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+ endif
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+ /*
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+ * Copyright (c) 2023 Nordic Semiconductor ASA
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+ * Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #ifndef ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_H_
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+ #define ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_H_
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+
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+ #if defined(CONFIG_CPU_CORTEX_M )
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+ #include "cmsis_core_m.h"
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+ #endif
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+
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+ #endif /* ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_H_ */
Original file line number Diff line number Diff line change 1
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/*
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* Copyright (c) 2017 Nordic Semiconductor ASA
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- * Copyright (c) 2023 Arm Limited
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+ * Copyright 2023,2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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* This header contains the interface to the ARM CMSIS Core headers.
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*/
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- #ifndef ZEPHYR_MODULES_CMSIS_CMSIS_M_H_
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- #define ZEPHYR_MODULES_CMSIS_CMSIS_M_H_
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+ #ifndef ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_H_
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+ #define ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_H_
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#if defined(CONFIG_CMSIS_M_CHECK_DEVICE_DEFINES ) && CONFIG_CMSIS_M_CHECK_DEVICE_DEFINES == 1U
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#define __CHECK_DEVICE_DEFINES 1U
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#error "__SAUREGION_PRESENT and CONFIG_CPU_HAS_ARM_SAU are not set to the same value"
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#endif
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- #endif /* ZEPHYR_MODULES_CMSIS_CMSIS_M_H_ */
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+ #endif /* ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_H_ */
Original file line number Diff line number Diff line change 1
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/*
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* Copyright (c) 2017 Nordic Semiconductor ASA
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- * Copyright (c) 2023 Arm Limited
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+ * Copyright 2023,2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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* ARM CMSIS Core headers.
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*/
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- #ifndef ZEPHYR_MODULES_CMSIS_CMSIS_M_DEFAULTS_H_
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- #define ZEPHYR_MODULES_CMSIS_CMSIS_M_DEFAULTS_H_
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+ #ifndef ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_DEFAULTS_H_
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+ #define ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_DEFAULTS_H_
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#include <zephyr/arch/arm/cortex_m/nvic.h>
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@@ -143,4 +143,4 @@ typedef enum {
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#error "Unknown Cortex-M device"
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#endif
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- #endif /* ZEPHYR_MODULES_CMSIS_CMSIS_M_DEFAULTS_H_ */
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+ #endif /* ZEPHYR_MODULES_CMSIS_6_CMSIS_CORE_M_DEFAULTS_H_ */
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