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rugeGerritsendanieldegrasse
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drivers: clock_control: nrf2_lfclk: Remove LPRC source
This source is not yet supported. It will be added back later. Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
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drivers/clock_control/clock_control_nrf2_lfclk.c

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -19,14 +19,13 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
1919

2020
#define LFCLK_HFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, hfxo)
2121

22-
#define LFCLK_LFLPRC_ACCURACY DT_INST_PROP(0, lflprc_accuracy_ppm)
2322
#define LFCLK_LFRC_ACCURACY DT_INST_PROP(0, lfrc_accuracy_ppm)
2423
#define LFCLK_HFXO_ACCURACY DT_PROP(LFCLK_HFXO_NODE, accuracy_ppm)
2524
#define LFCLK_LFLPRC_STARTUP_TIME_US DT_INST_PROP(0, lflprc_startup_time_us)
2625
#define LFCLK_LFRC_STARTUP_TIME_US DT_INST_PROP(0, lfrc_startup_time_us)
2726

28-
#define LFCLK_MAX_OPTS 5
29-
#define LFCLK_DEF_OPTS 3
27+
#define LFCLK_MAX_OPTS 4
28+
#define LFCLK_DEF_OPTS 2
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3130
#define NRFS_CLOCK_TIMEOUT K_MSEC(CONFIG_CLOCK_CONTROL_NRF2_NRFS_CLOCK_TIMEOUT_MS)
3231

@@ -35,7 +34,6 @@ BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1,
3534
/* Clock options sorted from highest to lowest power consumption.
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* - Clock synthesized from a high frequency clock
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* - Internal RC oscillator
38-
* - Internal low power RC oscillator
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* - External clock. These are inserted into the list at driver initialization.
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* Set to one of the following:
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* - XTAL. Low or High precision
@@ -57,12 +55,6 @@ static struct clock_options {
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.precision = 0,
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.src = NRFS_CLOCK_SRC_LFCLK_LFRC,
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},
60-
{
61-
/* NRFS will request FLL16M use HFXO in bypass mode if SYNTH src is used */
62-
.accuracy = LFCLK_LFLPRC_ACCURACY,
63-
.precision = 0,
64-
.src = NRFS_CLOCK_SRC_LFCLK_LFLPRC,
65-
},
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/* Remaining options are populated on lfclk_init */
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};
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