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soc: ti: cc23x0: Add power management
Add power management capabilities for cc23x0: - runtime-idle - standby - soft-off Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
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‎soc/ti/simplelink/cc23x0/CMakeLists.txt

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@@ -7,6 +7,8 @@ zephyr_sources(soc.c)
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zephyr_sources(ccfg.c)
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zephyr_include_directories(.)
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zephyr_sources_ifdef(CONFIG_PM power.c)
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zephyr_linker_sources_ifdef(CONFIG_HAS_TI_CCFG SECTIONS ccfg.ld)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

‎soc/ti/simplelink/cc23x0/Kconfig

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@@ -19,6 +19,8 @@ config SOC_SERIES_CC23X0
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select THREAD_STACK_INFO
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select BUILD_OUTPUT_HEX
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select BUILD_NO_GAP_FILL
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select HAS_PM
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select PM_DEVICE if PM
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menu "Bootloader Configuration"
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depends on SOC_SERIES_CC23X0

‎soc/ti/simplelink/cc23x0/power.c

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/*
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* Copyright (c) 2024 Texas Instruments Incorporated
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* Copyright (c) 2024 Baylibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/init.h>
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#include <zephyr/pm/pm.h>
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#include <zephyr/pm/policy.h>
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#include <ti/drivers/utils/Math.h>
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#include <ti/drivers/Power.h>
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#include <ti/drivers/power/PowerCC23X0.h>
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#include <inc/hw_types.h>
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#include <inc/hw_memmap.h>
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#include <inc/hw_ckmd.h>
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#include <inc/hw_systim.h>
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#include <inc/hw_rtc.h>
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#include <inc/hw_evtsvt.h>
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#include <inc/hw_ints.h>
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#include <driverlib/lrfd.h>
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#include <driverlib/ull.h>
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#include <driverlib/pmctl.h>
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/* Configuring TI Power module to not use its policy function (we use Zephyr's
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* instead), and disable oscillator calibration functionality for now.
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*/
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const PowerCC23X0_Config PowerCC23X0_config = {
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.policyInitFxn = NULL,
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.policyFxn = NULL,
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};
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#ifdef CONFIG_PM
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#define MAX_SYSTIMER_DELTA 0xFFBFFFFFU
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#define RTC_TO_SYSTIM_TICKS 8U
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#define SYSTIM_CH_STEP 4U
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#define SYSTIM_CH(idx) (SYSTIM_O_CH0CC + idx * SYSTIM_CH_STEP)
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#define SYSTIM_TO_RTC_SHIFT 3U
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#define SYSTIM_CH_CNT 5U
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#define RTC_NEXT(val, now) (((val - PowerCC23X0_WAKEDELAYSTANDBY) >> SYSTIM_TO_RTC_SHIFT) + now)
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static void pm_cc23x0_enter_standby(void);
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static int power_initialize(void);
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extern int_fast16_t PowerCC23X0_notify(uint_fast16_t eventType);
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static void pm_cc23x0_systim_standby_restore(void);
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/* Global to stash the SysTimer timeouts while we enter standby */
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static uint32_t systim[SYSTIM_CH_CNT];
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static uintptr_t key;
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static uint32_t systim_mask;
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/* Shift values to convert between the different resolutions of the SysTimer
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* channels. Channel 0 can technically support either 1us or 250ns. Until the
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* channel is actively used, we will hard-code it to 1us resolution to improve
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* runtime.
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*/
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const uint8_t systim_offset[SYSTIM_CH_CNT] = {
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0, /* 1us */
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0, /* 1us */
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2, /* 250ns -> 1us */
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2, /* 250ns -> 1us */
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2 /* 250ns -> 1us */
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};
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static void pm_cc23x0_systim_standby_restore(void)
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{
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HWREG(RTC_BASE + RTC_O_ARMCLR) = RTC_ARMCLR_CH0_CLR;
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HWREG(RTC_BASE + RTC_O_ICLR) = RTC_ICLR_EV0_CLR;
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ULLSync();
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HwiP_clearInterrupt(INT_CPUIRQ16);
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HWREG(EVTSVT_BASE + EVTSVT_O_CPUIRQ16SEL) = EVTSVT_CPUIRQ16SEL_PUBID_SYSTIM0;
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while (HWREG(SYSTIM_BASE + SYSTIM_O_STATUS) != SYSTIM_STATUS_VAL_RUN) {
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;
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}
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for (uint8_t idx = 0; idx < SYSTIM_CH_CNT; idx++) {
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if (systim_mask & (1 << idx)) {
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HWREG(SYSTIM_BASE + SYSTIM_CH(idx)) = systim[idx];
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}
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}
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HWREG(SYSTIM_BASE + SYSTIM_O_IMASK) = systim_mask;
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LRFDApplyClockDependencies();
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PowerCC23X0_notify(PowerLPF3_AWAKE_STANDBY);
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HwiP_restore(key);
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}
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static void pm_cc23x0_enter_standby(void)
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{
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uint32_t rtc_now = 0;
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uint32_t systim_now = 0;
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uint32_t systim_next = MAX_SYSTIMER_DELTA;
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uint32_t systim_delta = 0;
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key = HwiP_disable();
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uint32_t constraints = Power_getConstraintMask();
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bool standby = (constraints & (1 << PowerLPF3_DISALLOW_STANDBY)) == 0;
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bool idle = (constraints & (1 << PowerLPF3_DISALLOW_IDLE)) == 0;
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if (standby && (HWREG(CKMD_BASE + CKMD_O_LFCLKSEL) & CKMD_LFCLKSEL_MAIN_LFOSC) &&
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!(HWREG(CKMD_BASE + CKMD_O_LFCLKSTAT) & CKMD_LFCLKSTAT_FLTSETTLED_M)) {
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standby = false;
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idle = false;
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}
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if (standby) {
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systim_mask = HWREG(SYSTIM_BASE + SYSTIM_O_IMASK);
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if (systim_mask != 0) {
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systim_next = 0xFFFFFFFF;
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systim_now = HWREG(SYSTIM_BASE + SYSTIM_O_TIME1U);
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for (uint8_t idx = 0; idx < SYSTIM_CH_CNT; idx++) {
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if (systim_mask & (1 << idx)) {
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systim[idx] = HWREG(SYSTIM_BASE + SYSTIM_CH(idx));
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systim_delta = systim[idx];
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systim_delta -= systim_now << systim_offset[idx];
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if (systim_delta > MAX_SYSTIMER_DELTA) {
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systim_delta = 0;
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}
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systim_delta = systim_delta >> systim_offset[idx];
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systim_next = MIN(systim_next, systim_delta);
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}
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}
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} else {
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systim_next = MAX_SYSTIMER_DELTA;
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}
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if (systim_next > PowerCC23X0_TOTALTIMESTANDBY) {
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HWREG(EVTSVT_BASE + EVTSVT_O_CPUIRQ16SEL) =
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EVTSVT_CPUIRQ16SEL_PUBID_AON_RTC_COMB;
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HwiP_clearInterrupt(INT_CPUIRQ16);
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rtc_now = HWREG(RTC_BASE + RTC_O_TIME8U);
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HWREG(RTC_BASE + RTC_O_CH0CC8U) = RTC_NEXT(systim_next, rtc_now);
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Power_sleep(PowerLPF3_STANDBY);
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pm_cc23x0_systim_standby_restore();
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} else if (idle) {
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__WFI();
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}
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} else if (idle) {
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__WFI();
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}
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HwiP_restore(key);
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}
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void pm_state_set(enum pm_state state, uint8_t substate_id)
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{
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ARG_UNUSED(substate_id);
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switch (state) {
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case PM_STATE_RUNTIME_IDLE:
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PowerCC23X0_doWFI();
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break;
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case PM_STATE_STANDBY:
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pm_cc23x0_enter_standby();
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break;
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case PM_STATE_SOFT_OFF:
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Power_shutdown(0, 0);
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break;
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default:
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break;
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}
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}
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void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
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{
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ARG_UNUSED(state);
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ARG_UNUSED(substate_id);
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HwiP_restore(0);
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}
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#endif /* CONFIG_PM */
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static int power_initialize(void)
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{
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Power_init();
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if (DT_HAS_COMPAT_STATUS_OKAY(ti_cc23x0_lf_xosc)) {
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PowerLPF3_selectLFXT();
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}
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PMCTLSetVoltageRegulator(PMCTL_VOLTAGE_REGULATOR_DCDC);
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return 0;
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}
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SYS_INIT(power_initialize, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);

‎soc/ti/simplelink/cc23x0/soc.c

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#include <driverlib/setup.h>
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const uint_least8_t GPIO_pinLowerBound;
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const uint_least8_t GPIO_pinUpperBound = 25;
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void soc_reset_hook(void)
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{
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/* Perform necessary trim of the device. */

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