drivers: watchdog: Support Renesas RX independent watchdog timer driver

SangTranRVC · quytranpzz · commit e9e2e5c3ce85 · 2025-05-22T17:00:12.000+07:00
Add initial support for independent watchdog driver for Renesas RX
with r_iwdt_rx RDP HAL

Signed-off-by: Sang Tran &lt;sang.tran.jc@renesas.com&gt;
diff --git a/drivers/watchdog/CMakeLists.txt b/drivers/watchdog/CMakeLists.txt
@@ -5,6 +5,7 @@ zephyr_syscall_header(${ZEPHYR_BASE}/include/zephyr/drivers/watchdog.h)
 zephyr_library()
 
 zephyr_library_sources_ifdef(CONFIG_IWDG_STM32 wdt_iwdg_stm32.c)
+zephyr_library_sources_ifdef(CONFIG_IWDT_RENESAS_RX wdt_iwdt_renesas_rx.c)
 zephyr_library_sources_ifdef(CONFIG_WWDG_STM32 wdt_wwdg_stm32.c)
 
 zephyr_library_sources_ifdef(CONFIG_FWDGT_GD32 wdt_fwdgt_gd32.c)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
@@ -153,6 +153,8 @@ source "drivers/watchdog/Kconfig.rts5912"
 
 source "drivers/watchdog/Kconfig.renesas_ra"
 
+source "drivers/watchdog/Kconfig.renesas_rx"
+
 source "drivers/watchdog/Kconfig.wch"
 
 source "drivers/watchdog/Kconfig.nxp_ewm"
diff --git a/drivers/watchdog/Kconfig.renesas_rx b/drivers/watchdog/Kconfig.renesas_rx
@@ -0,0 +1,104 @@
+# Renesas RX Independent Watchdog (IWDT) configuration
+
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config IWDT_RENESAS_RX
+	bool "Renesas RX Series Independent Watchdog Driver"
+	default y
+	depends on DT_HAS_RENESAS_RX_IWDT_ENABLED
+	select HAS_WDT_DISABLE_AT_BOOT
+	select USE_RX_RDP_IWDT
+	help
+	  Enable Renesas RX series watchdog driver.
+
+if IWDT_RENESAS_RX
+
+config IWDT_RX_NMI
+	bool "Non-maskable interrupt for IWDT"
+	default y
+	help
+	  Enable NMI for IWDT.
+
+choice
+	prompt "IWDT Start Mode"
+	default IWDT_RENESAS_RX_IWDT
+	help
+	  Select the IWDT start mode.
+	  - IWDT_RENESAS_RX_AUTO_START_MODE: Counting automatically starts after a reset
+	  (auto-start mode), controlled by option function select register 0 (OFS0).
+	  - IWDT_RENESAS_RX_IWDT: Counting is started by refreshing the counter.
+	  (controlled by the IWDT registers)
+
+config IWDT_RENESAS_RX_AUTO_START_MODE
+	bool "Start IWDT automatically on reset"
+
+config IWDT_RENESAS_RX_IWDT
+	bool "IWDT Start Mode Select"
+	select USE_RX_RDP_IWDT
+
+endchoice
+
+if IWDT_RENESAS_RX_AUTO_START_MODE
+
+config IWDT_RENESAS_RX_IWDTSTRT
+	int "IWDT OFS0 Start Mode Select"
+	default 0
+	help
+	  0: IWDT is automatically activated in auto-start mode after a reset
+	  1: IWDT is halted after a reset
+
+config IWDT_RENESAS_RX_OFS0_IWDTTOPS
+	int "IWDT Timeout Period Select"
+	default 3
+	help
+	  0: 128 cycles (007Fh)
+	  1: 512 cycles (01FFh)
+	  2: 1024 cycles (03FFh)
+	  3: 2048 cycles (07FFh)
+
+config IWDT_RENESAS_RX_OFS0_IWDTCKS
+	int "IWDT Clock Divide Ratio Select"
+	default 15
+	help
+	  0: No division
+	  2: Divide-by-16
+	  3: Divide-by-32
+	  4: Divide-by-64
+	  15: Divide-by-128
+	  5: Divide-by-256
+
+config IWDT_RENESAS_RX_OFS0_IWDTRPSS
+	int "IWDT Window Start Position Select"
+	default 3
+	help
+	  0: 25%
+	  1: 50%
+	  2: 75%
+	  3: 100% (window start position is not specified.)
+
+config IWDT_RENESAS_RX_OFS0_IWDTRPES
+	int "IWDT Window End Position Select"
+	default 3
+	help
+	  0: 75%
+	  1: 50%
+	  2: 25%
+	  3: 0% (window end position is not specified.)
+
+config IWDT_RENESAS_RX_OFS0_IWDTRSTIRQS
+	int "IWDT Reset Interrupt Request Select"
+	default 0
+	help
+	  0: Non-maskable interrupt request output is enabled.
+	  1: Reset output is enabled.
+
+config IWDT_RENESAS_RX_OFS0_IWDTSLCSTP
+	int "IWDT Sleep Mode Count Stop Control"
+	default 0
+	help
+	  0: Count stop is disabled.
+	  1: Count is stopped at a transition to sleep mode, software standby mode, or deep sleep mode.
+
+endif # IWDT_RENESAS_RX_AUTO_START_MODE
+endif # IWDT_RENESAS_RX
diff --git a/drivers/watchdog/wdt_iwdt_renesas_rx.c b/drivers/watchdog/wdt_iwdt_renesas_rx.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation and/or its affiliates
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @brief Independent Watchdog (IWDT) Driver for Renesas RX
+ */
+
+#define DT_DRV_COMPAT renesas_rx_iwdt
+
+#include <zephyr/drivers/watchdog.h>
+#include <soc.h>
+#include <zephyr/kernel.h>
+#include <stdlib.h>
+#include <zephyr/arch/rx/sw_nmi_table.h>
+
+#include "r_iwdt_rx_if.h"
+
+#include <platform.h>
+
+#define LOG_LEVEL CONFIG_WDT_LOG_LEVEL
+#include <zephyr/logging/log.h>
+LOG_MODULE_REGISTER(wdt_iwdt_rx);
+
+#define IWDT_NODELABEL      DT_NODELABEL(iwdt)
+#define IWDT_NMI_VECTOR     2
+#define IWDT_WINDOW_START   DT_PROP(IWDT_NODELABEL, window_start)
+#define IWDT_WINDOW_END     DT_PROP(IWDT_NODELABEL, window_end)
+
+#define WDT_RENESAS_RX_SUPPORTED_FLAGS (WDT_FLAG_RESET_NONE | WDT_FLAG_RESET_SOC)
+struct wdt_iwdt_rx_config {
+	struct st_iwdt *const regs;
+	const struct device *clock_dev;
+};
+
+struct wdt_iwdt_rx_data {
+	wdt_callback_t callback;
+	iwdt_config_t iwdt_config;
+	bool timeout_installed;
+};
+
+#if CONFIG_IWDT_RX_NMI
+static void wdt_iwdt_isr(const struct device *dev)
+{
+	struct wdt_iwdt_rx_data *data = dev->data;
+
+	if (data->callback) {
+		data->callback(dev, 0);
+	}
+}
+
+static void iwdt_enable_nmi(void)
+{
+	ICU.NMIER.BIT.IWDTEN = 0x1;
+}
+#endif /* CONFIG_IWDT_RX_NMI */
+
+static int wdt_iwdt_rx_disable(const struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	/* watchdog cannot be stopped once started */
+	LOG_ERR("Independent Watchdog cannot be stopped once started");
+
+	return -EPERM;
+}
+
+static int wdt_iwdt_rx_feed(const struct device *dev, int channel_id)
+{
+	ARG_UNUSED(dev);
+	ARG_UNUSED(channel_id);
+	iwdt_err_t err;
+
+	/* Reset counter */
+	err = R_IWDT_Control(IWDT_CMD_REFRESH_COUNTING, NULL);
+	if (err != IWDT_SUCCESS) {
+		return -EIO;
+	}
+
+	return 0;
+}
+
+static int wdt_iwdt_rx_install_timeout(const struct device *dev, const struct wdt_timeout_cfg *cfg)
+{
+	struct wdt_iwdt_rx_data *data = dev->data;
+	const struct wdt_iwdt_rx_config *iwdt_cfg = dev->config;
+	uint32_t clock_rate;
+	int ret;
+
+	/* Get the iwdt clock rate in hz */
+	ret = clock_control_get_rate(iwdt_cfg->clock_dev, NULL, &clock_rate);
+	if (ret != 0) {
+		return ret;
+	}
+
+	uint32_t clock_rate_khz = clock_rate / 1000;
+
+	const uint16_t timeout_period[4] = {128, 512, 1024, 2048};
+	const uint16_t clock_divide[6][2] = {{IWDT_CLOCK_DIV_1, 1},     {IWDT_CLOCK_DIV_16, 16},
+					     {IWDT_CLOCK_DIV_32, 32},   {IWDT_CLOCK_DIV_64, 64},
+					     {IWDT_CLOCK_DIV_128, 128}, {IWDT_CLOCK_DIV_256, 256}};
+	int16_t last_error = INT16_MAX;
+	int32_t error;
+	uint16_t iwdt_tops = 0;
+	uint16_t iwdt_clock_div = 0;
+	uint16_t iwdt_timeout = ((uint32_t)timeout_period[0] * clock_divide[0][1]) / clock_rate_khz;
+
+	if (cfg->window.min > cfg->window.max || cfg->window.max < iwdt_timeout) {
+		return -EINVAL;
+	}
+
+	if ((cfg->flags & ~WDT_RENESAS_RX_SUPPORTED_FLAGS) != 0) {
+		return -ENOTSUP;
+	}
+
+	if (cfg->callback != NULL && (cfg->flags & WDT_FLAG_RESET_MASK) != 0) {
+		LOG_ERR("WDT_FLAG_RESET_NONE should be chosen in case of interrupt response");
+		return -ENOTSUP;
+	}
+
+#if CONFIG_IWDT_RENESAS_RX_IWDT
+	for (int idx_p = 0; idx_p < 4; idx_p++) {
+		for (int idx_d = 0; idx_d < 6; idx_d++) {
+			iwdt_timeout = ((uint32_t)timeout_period[idx_p] * clock_divide[idx_d][1]) /
+				       clock_rate_khz;
+			error = cfg->window.max - iwdt_timeout;
+
+			if (error < 0) {
+				break;
+			}
+
+			if (error < last_error) {
+				last_error = error;
+				iwdt_tops = idx_p;
+				iwdt_clock_div = clock_divide[idx_d][0];
+			}
+		}
+	}
+
+	data->iwdt_config.timeout = iwdt_tops;
+	data->iwdt_config.iwdtclk_div = iwdt_clock_div;
+	data->iwdt_config.window_start = IWDT_WINDOW_START;
+	data->iwdt_config.window_end = IWDT_WINDOW_END;
+	data->iwdt_config.timeout_control =
+		(cfg->flags & WDT_FLAG_RESET_MASK) != 0 ? IWDT_TIMEOUT_RESET : IWDT_TIMEOUT_NMI;
+	data->iwdt_config.count_stop_enable = IWDT_COUNT_STOP_DISABLE;
+#endif /* CONFIG_IWDT_RENESAS_RX_IWDT */
+
+	data->timeout_installed = true;
+
+#if CONFIG_IWDT_RX_NMI
+	data->callback = cfg->callback;
+#endif
+
+	return 0;
+}
+
+static int wdt_iwdt_rx_setup(const struct device *dev, uint8_t options)
+{
+	struct wdt_iwdt_rx_data *data = dev->data;
+	iwdt_err_t err;
+	int ret;
+
+#if CONFIG_IWDT_RENESAS_RX_IWDT
+	if (!data->timeout_installed) {
+		return -EINVAL;
+	}
+#endif /* CONFIG_IWDT_RENESAS_RX_IWDT */
+
+	if (options & WDT_OPT_PAUSE_IN_SLEEP) {
+		data->iwdt_config.count_stop_enable = IWDT_COUNT_STOP_ENABLE;
+	} else {
+		data->iwdt_config.count_stop_enable = IWDT_COUNT_STOP_DISABLE;
+	}
+
+	if (options & WDT_OPT_PAUSE_HALTED_BY_DBG) {
+		return -ENOTSUP;
+	}
+
+#if CONFIG_IWDT_RX_NMI
+	nmi_enable(IWDT_NMI_VECTOR, (nmi_callback_t)wdt_iwdt_isr, (void *)dev);
+	iwdt_enable_nmi();
+#endif /* CONFIG_IWDT_RX_NMI */
+
+#if CONFIG_IWDT_RENESAS_RX_IWDT
+
+	err = R_IWDT_Open(&data->iwdt_config);
+	if (err != IWDT_SUCCESS) {
+		return -EINVAL;
+	}
+
+	ret = wdt_iwdt_rx_feed(dev, 0);
+	if (ret != 0) {
+		return ret;
+	}
+#endif /* CONFIG_IWDT_RENESAS_RX_IWDT */
+
+	return 0;
+}
+
+static DEVICE_API(wdt, wdt_iwdt_rx_api) = {
+	.disable = wdt_iwdt_rx_disable,
+	.feed = wdt_iwdt_rx_feed,
+	.install_timeout = wdt_iwdt_rx_install_timeout,
+	.setup = wdt_iwdt_rx_setup,
+};
+
+#define IWDT_RENESAS_RX_DEFINE(idx)                                                                \
+	static struct wdt_iwdt_rx_config iwdt_rx_cfg##idx = {                                      \
+		.regs = (struct st_iwdt *)DT_REG_ADDR(IWDT_NODELABEL),                             \
+		.clock_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(idx)),                                   \
+	};                                                                                         \
+	static struct wdt_iwdt_rx_data iwdt_rx_data##idx = {                                       \
+		.timeout_installed = false,                                                        \
+		.iwdt_config = {.count_stop_enable = IWDT_COUNT_STOP_DISABLE,                      \
+				.timeout_control = IWDT_TIMEOUT_RESET},                            \
+	};                                                                                         \
+                                                                                                   \
+	DEVICE_DT_DEFINE(idx, NULL, NULL, &iwdt_rx_data##idx, &iwdt_rx_cfg##idx, POST_KERNEL,      \
+			 CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &wdt_iwdt_rx_api);
+
+DT_FOREACH_STATUS_OKAY(renesas_rx_iwdt, IWDT_RENESAS_RX_DEFINE);
diff --git a/dts/bindings/watchdog/renesas,rx-iwdt.yaml b/dts/bindings/watchdog/renesas,rx-iwdt.yaml
@@ -0,0 +1,39 @@
+# Copyright (c) 2025 Renesas Electronics Corporation and/or its affiliates
+# SPDX-License-Identifier: Apache-2.0
+
+description: Renesas RX Independent Watchdog
+
+compatible: "renesas,rx-iwdt"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true
+
+  clocks:
+    required: true
+
+  window-start:
+    required: true
+    type: int
+    enum: [0, 0x1000, 0x2000, 0x3000]
+    description: |
+      The start of the window in clock cycles. The watchdog will reset the system
+      if the watchdog is not refreshed within the window.
+      - 0: 25%
+      - 0x1000: 50%
+      - 0x2000: 75%
+      - 0x3000: 100% (window end position is not specified.)
+
+  window-end:
+    required: true
+    type: int
+    enum: [0, 0x100, 0x200, 0x300]
+    description: |
+      The end of the window in clock cycles. The watchdog will reset the system
+      if the watchdog is not refreshed within the window.
+      - 0: 75%
+      - 0x200: 50%
+      - 0x200: 25%
+      - 0x300: 0% (window start position is not specified.)
diff --git a/modules/Kconfig.renesas b/modules/Kconfig.renesas
@@ -274,4 +274,9 @@ config USE_RX_RDP_SCI_UART
 	help
 	  Enable RX RDP SCI UART driver
 
+config USE_RX_RDP_IWDT
+	bool
+	help
+	  Enable RX RDP IWDT driver
+
 endif # HAS_RENESAS_RX_RDP
