|
16 | 16 |
|
17 | 17 | LOG_MODULE_REGISTER(ambiq_ctimer_pwm, CONFIG_PWM_LOG_LEVEL);
|
18 | 18 |
|
19 |
| -struct pwm_ambiq_timer_data { |
| 19 | +struct pwm_ambiq_ctimer_data { |
20 | 20 | uint32_t cycles;
|
21 | 21 | };
|
22 | 22 |
|
23 |
| -struct pwm_ambiq_timer_config { |
| 23 | +struct pwm_ambiq_ctimer_config { |
24 | 24 | uint32_t timer_num;
|
25 | 25 | uint32_t timer_seg;
|
26 | 26 | uint32_t pwm_type;
|
@@ -126,11 +126,11 @@ static void start_clock(uint32_t clock_sel)
|
126 | 126 | }
|
127 | 127 | }
|
128 | 128 |
|
129 |
| -static int ambiq_timer_pwm_set_cycles(const struct device *dev, uint32_t channel, |
| 129 | +static int ambiq_ctimer_pwm_set_cycles(const struct device *dev, uint32_t channel, |
130 | 130 | uint32_t period_cycles, uint32_t pulse_cycles,
|
131 | 131 | pwm_flags_t flags)
|
132 | 132 | {
|
133 |
| - const struct pwm_ambiq_timer_config *config = dev->config; |
| 133 | + const struct pwm_ambiq_ctimer_config *config = dev->config; |
134 | 134 |
|
135 | 135 | if (period_cycles == 0) {
|
136 | 136 | LOG_ERR("period_cycles can not be set to zero");
|
@@ -171,21 +171,21 @@ static int ambiq_timer_pwm_set_cycles(const struct device *dev, uint32_t channel
|
171 | 171 | return 0;
|
172 | 172 | }
|
173 | 173 |
|
174 |
| -static int ambiq_timer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t channel, |
| 174 | +static int ambiq_ctimer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t channel, |
175 | 175 | uint64_t *cycles)
|
176 | 176 | {
|
177 |
| - struct pwm_ambiq_timer_data *data = dev->data; |
| 177 | + struct pwm_ambiq_ctimer_data *data = dev->data; |
178 | 178 |
|
179 | 179 | /* cycles of the timer clock */
|
180 | 180 | *cycles = (uint64_t)data->cycles;
|
181 | 181 |
|
182 | 182 | return 0;
|
183 | 183 | }
|
184 | 184 |
|
185 |
| -static int ambiq_timer_pwm_init(const struct device *dev) |
| 185 | +static int ambiq_ctimer_pwm_init(const struct device *dev) |
186 | 186 | {
|
187 |
| - const struct pwm_ambiq_timer_config *config = dev->config; |
188 |
| - struct pwm_ambiq_timer_data *data = dev->data; |
| 187 | + const struct pwm_ambiq_ctimer_config *config = dev->config; |
| 188 | + struct pwm_ambiq_ctimer_data *data = dev->data; |
189 | 189 | int err;
|
190 | 190 |
|
191 | 191 | err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
|
@@ -219,28 +219,28 @@ static int ambiq_timer_pwm_init(const struct device *dev)
|
219 | 219 | return 0;
|
220 | 220 | }
|
221 | 221 |
|
222 |
| -static DEVICE_API(pwm, pwm_ambiq_timer_driver_api) = { |
223 |
| - .set_cycles = ambiq_timer_pwm_set_cycles, |
224 |
| - .get_cycles_per_sec = ambiq_timer_pwm_get_cycles_per_sec, |
| 222 | +static DEVICE_API(pwm, pwm_ambiq_ctimer_driver_api) = { |
| 223 | + .set_cycles = ambiq_ctimer_pwm_set_cycles, |
| 224 | + .get_cycles_per_sec = ambiq_ctimer_pwm_get_cycles_per_sec, |
225 | 225 | };
|
226 | 226 |
|
227 |
| -#define PWM_AMBIQ_TIMER_DEVICE_INIT(n) \ |
| 227 | +#define PWM_AMBIQ_CTIMER_DEVICE_INIT(n) \ |
228 | 228 | BUILD_ASSERT(DT_CHILD_NUM_STATUS_OKAY(DT_INST_PARENT(n)) == 1, \
|
229 | 229 | "Too many children for Timer!"); \
|
230 | 230 | PINCTRL_DT_INST_DEFINE(n); \
|
231 |
| - static struct pwm_ambiq_timer_data pwm_ambiq_timer_data_##n = { \ |
| 231 | + static struct pwm_ambiq_ctimer_data pwm_ambiq_ctimer_data_##n = { \ |
232 | 232 | .cycles = 0, \
|
233 | 233 | }; \
|
234 |
| - static const struct pwm_ambiq_timer_config pwm_ambiq_timer_config_##n = { \ |
| 234 | + static const struct pwm_ambiq_ctimer_config pwm_ambiq_ctimer_config_##n = { \ |
235 | 235 | .timer_num = (DT_REG_ADDR(DT_INST_PARENT(n)) - CTIMER_BASE) / \
|
236 | 236 | DT_REG_SIZE(DT_INST_PARENT(n)), \
|
237 | 237 | .timer_seg = DT_INST_ENUM_IDX(n, timer_segment), \
|
238 | 238 | .clock_sel = DT_ENUM_IDX(DT_INST_PARENT(n), clk_source), \
|
239 | 239 | .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
|
240 | 240 | .pwm_type = DT_INST_ENUM_IDX(n, pwm_type)}; \
|
241 | 241 | \
|
242 |
| - DEVICE_DT_INST_DEFINE(n, ambiq_timer_pwm_init, NULL, &pwm_ambiq_timer_data_##n, \ |
243 |
| - &pwm_ambiq_timer_config_##n, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \ |
244 |
| - &pwm_ambiq_timer_driver_api); |
| 242 | + DEVICE_DT_INST_DEFINE(n, ambiq_ctimer_pwm_init, NULL, &pwm_ambiq_ctimer_data_##n, \ |
| 243 | + &pwm_ambiq_ctimer_config_##n, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \ |
| 244 | + &pwm_ambiq_ctimer_driver_api); |
245 | 245 |
|
246 |
| -DT_INST_FOREACH_STATUS_OKAY(PWM_AMBIQ_TIMER_DEVICE_INIT) |
| 246 | +DT_INST_FOREACH_STATUS_OKAY(PWM_AMBIQ_CTIMER_DEVICE_INIT) |
0 commit comments