drivers: serial: uart_mcux_flexcomm: add support for clock management

Add support for clock management to the serial flexcomm driver, dependent
on CONFIG_CLOCK_MGMT. When clock management is not enabled, the flexcomm
driver will fall back to the clock control API.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>

Author: danieldegrasse

drivers/serial/uart_mcux_flexcomm.c

@@ -21,6 +21,7 @@
 #include <soc.h>
 #include <fsl_device_registers.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/drivers/clock_management.h>
 #ifdef CONFIG_UART_ASYNC_API
 #include <zephyr/drivers/dma.h>
 #include <fsl_inputmux.h>
@@ -37,14 +38,19 @@ struct mcux_flexcomm_uart_dma_config {
 
 struct mcux_flexcomm_config {
 	USART_Type *base;
-	const struct device *clock_dev;
-	clock_control_subsys_t clock_subsys;
 	uint32_t baud_rate;
 	uint8_t parity;
 #ifdef CONFIG_UART_MCUX_FLEXCOMM_ISR_SUPPORT
 	void (*irq_config_func)(const struct device *dev);
 #endif
 	const struct pinctrl_dev_config *pincfg;
+#ifdef CONFIG_CLOCK_MANAGEMENT
+	const struct clock_output *clock_output;
+	clock_management_state_t clock_state;
+#else
+	const struct device *clock_dev;
+	clock_control_subsys_t clock_subsys;
+#endif
 #ifdef CONFIG_UART_ASYNC_API
 	struct mcux_flexcomm_uart_dma_config tx_dma;
 	struct mcux_flexcomm_uart_dma_config rx_dma;
@@ -395,8 +401,12 @@ static int mcux_flexcomm_uart_configure(const struct device *dev, const struct u
 	USART_Deinit(config->base);
 
 	/* Get UART clock frequency */
+#ifdef CONFIG_CLOCK_MANAGEMENT
+	clock_freq = clock_management_get_rate(config->clock_output);
+#else
 	clock_control_get_rate(config->clock_dev,
 		config->clock_subsys, &clock_freq);
+#endif
 
 	/* Handle 9 bit mode */
 	USART_Enable9bitMode(config->base, nine_bit_mode);
@@ -1051,15 +1061,53 @@ static void mcux_flexcomm_isr(const struct device *dev)
 }
 #endif /* CONFIG_UART_MCUX_FLEXCOMM_ISR_SUPPORT */
 
+static void mcux_flexcomm_uart_setup(const struct device *dev, uint32_t clock_rate)
+{
+	const struct mcux_flexcomm_config *config = dev->config;
+	usart_config_t usart_config;
+	usart_parity_mode_t parity_mode;
+
+	if (config->parity == UART_CFG_PARITY_ODD) {
+		parity_mode = kUSART_ParityOdd;
+	} else if (config->parity == UART_CFG_PARITY_EVEN) {
+		parity_mode = kUSART_ParityEven;
+	} else {
+		parity_mode = kUSART_ParityDisabled;
+	}
+
+	USART_GetDefaultConfig(&usart_config);
+	usart_config.enableTx = true;
+	usart_config.enableRx = true;
+	usart_config.parityMode = parity_mode;
+	usart_config.baudRate_Bps = config->baud_rate;
+
+	USART_Init(config->base, &usart_config, clock_rate);
+}
+
+#ifdef CONFIG_CLOCK_MANAGEMENT_RUNTIME
+int uart_mcux_flexcomm_clock_cb(const struct clock_management_event *ev, const void *data)
+{
+	const struct device *uart_dev = data;
+	const struct mcux_flexcomm_config *config = uart_dev->config;
+
+	if (ev->type == CLOCK_MANAGEMENT_PRE_RATE_CHANGE) {
+		/* Deinit USART */
+		USART_Deinit(config->base);
+	} else if (ev->type == CLOCK_MANAGEMENT_POST_RATE_CHANGE) {
+		/* Reconfigure USART */
+		mcux_flexcomm_uart_setup(uart_dev, ev->new_rate);
+	}
+	return 0;
+}
+#endif
+
 static int mcux_flexcomm_init_common(const struct device *dev)
 {
 	const struct mcux_flexcomm_config *config = dev->config;
 #ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
 	struct mcux_flexcomm_data *data = dev->data;
 	struct uart_config *cfg = &data->uart_config;
 #endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */
-	usart_config_t usart_config;
-	usart_parity_mode_t parity_mode;
 	uint32_t clock_freq;
 	int err;
 
@@ -1068,6 +1116,14 @@ static int mcux_flexcomm_init_common(const struct device *dev)
 		return err;
 	}
 
+#ifdef CONFIG_CLOCK_MANAGEMENT
+	clock_freq = clock_management_apply_state(config->clock_output,
+					    config->clock_state);
+#ifdef CONFIG_CLOCK_MANAGEMENT_RUNTIME
+	clock_management_set_callback(config->clock_output,
+				uart_mcux_flexcomm_clock_cb, dev);
+#endif
+#else
 	if (!device_is_ready(config->clock_dev)) {
 		return -ENODEV;
 	}
@@ -1077,20 +1133,8 @@ static int mcux_flexcomm_init_common(const struct device *dev)
 				   &clock_freq)) {
 		return -EINVAL;
 	}
-
-	if (config->parity == UART_CFG_PARITY_ODD) {
-		parity_mode = kUSART_ParityOdd;
-	} else if (config->parity == UART_CFG_PARITY_EVEN) {
-		parity_mode = kUSART_ParityEven;
-	} else {
-		parity_mode = kUSART_ParityDisabled;
-	}
-
-	USART_GetDefaultConfig(&usart_config);
-	usart_config.enableTx = true;
-	usart_config.enableRx = true;
-	usart_config.parityMode = parity_mode;
-	usart_config.baudRate_Bps = config->baud_rate;
+#endif
+	mcux_flexcomm_uart_setup(dev, clock_freq);
 
 #ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE
 	cfg->baudrate = config->baud_rate;
@@ -1101,8 +1145,6 @@ static int mcux_flexcomm_init_common(const struct device *dev)
 	cfg->flow_ctrl = UART_CFG_FLOW_CTRL_NONE;
 #endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */
 
-	USART_Init(config->base, &usart_config, clock_freq);
-
 #ifdef CONFIG_UART_MCUX_FLEXCOMM_ISR_SUPPORT
 	config->irq_config_func(dev);
 #endif
@@ -1266,20 +1308,31 @@ DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_RX_TIMEOUT_FUNC);
 #define UART_MCUX_FLEXCOMM_ASYNC_CFG(n)
 #endif /* CONFIG_UART_ASYNC_API */
 
+#ifdef CONFIG_CLOCK_MANAGEMENT
+#define UART_MCUX_FLEXCOMM_CLK_DEFINE(n) CLOCK_MANAGEMENT_DT_INST_DEFINE_OUTPUT(n)
+#define UART_MCUX_FLEXCOMM_CLK_INIT(n)						\
+	.clock_output = CLOCK_MANAGEMENT_DT_INST_GET_OUTPUT(n),                       \
+	.clock_state = CLOCK_MANAGEMENT_DT_INST_GET_STATE(n, default, default),
+#else
+#define UART_MCUX_FLEXCOMM_CLK_DEFINE(n)
+#define UART_MCUX_FLEXCOMM_CLK_INIT(n)						\
+	.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),			\
+	.clock_subsys =	(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),
+#endif
+
 #define UART_MCUX_FLEXCOMM_INIT_CFG(n)						\
 static const struct mcux_flexcomm_config mcux_flexcomm_##n##_config = {		\
 	.base = (USART_Type *)DT_INST_REG_ADDR(n),				\
-	.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),			\
-	.clock_subsys =								\
-	(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),			\
 	.baud_rate = DT_INST_PROP(n, current_speed),				\
 	.parity = DT_INST_ENUM_IDX(n, parity),					\
 	.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),				\
+	UART_MCUX_FLEXCOMM_CLK_INIT(n)						\
 	UART_MCUX_FLEXCOMM_IRQ_CFG_FUNC_INIT(n)					\
 	UART_MCUX_FLEXCOMM_ASYNC_CFG(n)						\
 };
 
 #define UART_MCUX_FLEXCOMM_INIT(n)						\
+	UART_MCUX_FLEXCOMM_CLK_DEFINE(n);					\
 										\
 	PINCTRL_DT_INST_DEFINE(n);						\
 										\