tests: kernel/arch: various doxygen fixes

Group test using doxygen and other doxygen fixups.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>

Author: nashif

tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c

@@ -120,7 +120,7 @@ void arm_isr_handler(const void *args)
  * @{
  */
 
-ZTEST(arm_custom_interrupt, test_arm_interrupt)
+ZTEST(arm_custom_interrupt, test_arm_custom_interrupt)
 {
 	zassert_true(custom_init_called, "Custom IRQ init not called\n");
 

tests/arch/arm/arm_interrupt/src/arm_interrupt.c

@@ -142,6 +142,10 @@ void set_regs_with_known_pattern(void *p1, void *p2, void *p3)
 			 "udf #90\n");
 }
 
+/**
+ * @brief Test to verify code fault handling in ISR execution context
+ * @ingroup kernel_fatal_tests
+ */
 ZTEST(arm_interrupt, test_arm_esf_collection)
 {
 	int test_validation_rv;
@@ -222,6 +226,10 @@ void arm_isr_handler(const void *args)
 	}
 }
 
+/**
+ * @brief Test ARM Interrupt handling
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_interrupt, test_arm_interrupt)
 {
 	/* Determine an NVIC IRQ line that is not currently in use. */
@@ -390,6 +398,10 @@ static inline void z_vrfy_test_arm_user_interrupt_syscall(void)
 }
 #include <zephyr/syscalls/test_arm_user_interrupt_syscall_mrsh.c>
 
+/**
+ * @brief Test ARM Interrupt handling in user mode
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST_USER(arm_interrupt, test_arm_user_interrupt)
 {
 	/* Test thread executing in user mode */
@@ -434,6 +446,11 @@ ZTEST_USER(arm_interrupt, test_arm_user_interrupt)
 #pragma GCC push_options
 #pragma GCC optimize("O0")
 /* Avoid compiler optimizing null pointer de-referencing. */
+
+/**
+ * @brief Test ARM Null Pointer Exception handling
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_interrupt, test_arm_null_pointer_exception)
 {
 	Z_TEST_SKIP_IFNDEF(CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION);
@@ -454,7 +471,3 @@ ZTEST(arm_interrupt, test_arm_null_pointer_exception)
 	zassert_equal(reason, -1, "expected_reason has not been reset (%d)\n", reason);
 }
 #pragma GCC pop_options
-
-/**
- * @}
- */

tests/arch/arm/arm_irq_advanced_features/src/arm_dynamic_direct_interrupts.c

@@ -28,6 +28,10 @@ void arm_direct_isr_handler_1(const void *args)
 	test_flag = 2;
 }
 
+/**
+ * @brief Test the ARM Dynamic Direct Interrupts functionality.
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_irq_advanced_features, test_arm_dynamic_direct_interrupts)
 {
 	int post_flag = 0;
@@ -81,6 +85,3 @@ ZTEST(arm_irq_advanced_features, test_arm_dynamic_direct_interrupts)
 	post_flag = test_flag;
 	zassert_true(post_flag == 2, "Test flag not set by ISR1\n");
 }
-/**
- * @}
- */

tests/arch/arm/arm_irq_advanced_features/src/arm_irq_target_state.c

@@ -13,6 +13,10 @@
 extern irq_target_state_t irq_target_state_set(unsigned int irq, irq_target_state_t target_state);
 extern int irq_target_state_is_secure(unsigned int irq);
 
+/**
+ * @brief Test the ARM IRQ target state functionality.
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_irq_advanced_features, test_arm_irq_target_state)
 {
 	/* Determine an NVIC IRQ line that is implemented
@@ -82,6 +86,3 @@ ZTEST(arm_irq_advanced_features, test_arm_irq_target_state)
 	TC_PRINT("Skipped (TrustZone-M-enabled Cortex-M Mainline only)\n");
 }
 #endif /* CONFIG_ZERO_LATENCY_IRQS */
-/**
- * @}
- */

tests/arch/arm/arm_irq_advanced_features/src/arm_zero_latency_irqs.c

@@ -18,6 +18,10 @@ void arm_zero_latency_isr_handler(const void *args)
 	test_flag = 1;
 }
 
+/**
+ * @brief Test ARM Zero latency Interrupt functionality.
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_irq_advanced_features, test_arm_zero_latency_irqs)
 {
 
@@ -101,7 +105,3 @@ ZTEST(arm_irq_advanced_features, test_arm_zero_latency_irqs)
 
 	irq_unlock(key);
 }
-
-/**
- * @}
- */

tests/arch/arm/arm_sw_vector_relay/src/arm_sw_vector_relay.c

@@ -15,6 +15,13 @@ extern uint32_t _vector_table;
 extern uint32_t __vector_relay_handler;
 extern uint32_t _vector_table_pointer;
 
+
+/**
+ * @brief Test the ARM Software Vector Relay functionality.
+ *
+ * This test verifies the correctness of the ARM software vector relay mechanism.
+ * @ingroup kernel_arch_interrupt_tests
+ */
 ZTEST(arm_sw_vector_relay, test_arm_sw_vector_relay)
 {
 	uint32_t vector_relay_table_addr = (uint32_t)&__vector_relay_table;
@@ -61,6 +68,3 @@ ZTEST(arm_sw_vector_relay, test_arm_sw_vector_relay)
 		     _vector_table_pointer, _vector_start);
 #endif
 }
-/**
- * @}
- */

tests/arch/arm/arm_thread_swap/src/arm_syscalls.c

@@ -143,7 +143,10 @@ static void user_thread_entry(void *p1, void *p2, void *p3)
 	barrier_isync_fence_full();
 #endif
 }
-
+/**
+ * @brief Test ARM thread swap mechanism
+ * @ingroup kernel_arch_sched_tests
+ */
 ZTEST(arm_thread_swap, test_arm_syscalls)
 {
 	int i = 0;
@@ -288,6 +291,3 @@ ZTEST(arm_thread_swap, test_arm_syscalls)
 }
 
 #endif /* CONFIG_USERSPACE */
-/**
- * @}
- */

tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c

@@ -370,6 +370,10 @@ static int __noinline arch_swap_wrapper(void)
 }
 #endif
 
+/**
+ * @brief Test the ARM thread swap mechanism
+ * @ingroup kernel_arch_sched_tests
+ */
 ZTEST(arm_thread_swap, test_arm_thread_swap)
 {
 	int test_flag;
@@ -662,6 +666,3 @@ ZTEST(arm_thread_swap, test_arm_thread_swap)
 #endif
 #endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
 }
-/**
- * @}
- */

tests/arch/common/ramfunc/src/ramfunc.c

@@ -53,6 +53,3 @@ ZTEST(ramfunc, test_ramfunc)
 	zassert_true(post_flag == 1,
 		"ram_function() execution failed.");
 }
-/**
- * @}
- */

tests/kernel/common/src/irq_offload.c

@@ -140,7 +140,7 @@ ZTEST(common_1cpu, test_nested_irq_offload)
 	k_thread_abort(&offload_thread);
 }
 /**
- *
+ * @}
  */
 extern void *common_setup(void);
 ZTEST_SUITE(irq_offload, NULL, common_setup, NULL, NULL, NULL);