boards: nordic: nrf54l15_ns: Change to use common dts partitioning file

nordicjm · henrikbrixandersen · commit e542188ce9c0 · 2025-06-17T16:11:45.000+02:00
Adds a common vendor dts file specifying the default partition
layout for nRF54L15-based cpuapp_ns board targets and updates boards
to use this common file.

Signed-off-by: Jamie McCrae &lt;jamie.mccrae@nordicsemi.no&gt;
diff --git a/boards/ezurio/bl54l15_dvk/bl54l15_dvk_nrf54l15_cpuapp_ns.dts b/boards/ezurio/bl54l15_dvk/bl54l15_dvk_nrf54l15_cpuapp_ns.dts
@@ -58,51 +58,6 @@
 	};
 };
 
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
-		 * last 96kB are reserved for the FLPR MCU.
-		 *
-		 * This static layout needs to be the same with the upstream TF-M layout in the
-		 * header flash_layout.h of the relevant platform. Any updates in the layout
-		 * needs to happen both in the flash_layout.h and in this file at the same time.
-		 */
-		slot0_partition: partition@0 {
-			label = "image-0";
-			reg = <0x0000000 DT_SIZE_K(512)>;
-		};
-
-		tfm_ps_partition: partition@80000 {
-			label = "tfm-ps";
-			reg = <0x00080000 DT_SIZE_K(16)>;
-		};
-
-		tfm_its_partition: partition@84000 {
-			label = "tfm-its";
-			reg = <0x00084000 DT_SIZE_K(16)>;
-		};
-
-		tfm_otp_partition: partition@88000 {
-			label = "tfm-otp";
-			reg = <0x00088000 DT_SIZE_K(8)>;
-		};
-
-		slot0_ns_partition: partition@8A000 {
-			label = "image-0-nonsecure";
-			reg = <0x0008A000 DT_SIZE_K(844)>;
-		};
-
-		storage_partition: partition@15D000 {
-			label = "storage";
-			reg = <0x00015D000 DT_SIZE_K(32)>;
-		};
-	};
-};
-
 &uart30 {
 	/* Disable so that TF-M can use this UART */
 	status = "disabled";
@@ -112,3 +67,6 @@
 	pinctrl-1 = <&uart30_sleep>;
 	pinctrl-names = "default", "sleep";
 };
+
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l15_ns_partition.dtsi>
diff --git a/boards/ezurio/bl54l15u_dvk/bl54l15u_dvk_nrf54l15_cpuapp_ns.dts b/boards/ezurio/bl54l15u_dvk/bl54l15u_dvk_nrf54l15_cpuapp_ns.dts
@@ -58,51 +58,6 @@
 	};
 };
 
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
-		 * last 96kB are reserved for the FLPR MCU.
-		 *
-		 * This static layout needs to be the same with the upstream TF-M layout in the
-		 * header flash_layout.h of the relevant platform. Any updates in the layout
-		 * needs to happen both in the flash_layout.h and in this file at the same time.
-		 */
-		slot0_partition: partition@0 {
-			label = "image-0";
-			reg = <0x0000000 DT_SIZE_K(512)>;
-		};
-
-		tfm_ps_partition: partition@80000 {
-			label = "tfm-ps";
-			reg = <0x00080000 DT_SIZE_K(16)>;
-		};
-
-		tfm_its_partition: partition@84000 {
-			label = "tfm-its";
-			reg = <0x00084000 DT_SIZE_K(16)>;
-		};
-
-		tfm_otp_partition: partition@88000 {
-			label = "tfm-otp";
-			reg = <0x00088000 DT_SIZE_K(8)>;
-		};
-
-		slot0_ns_partition: partition@8A000 {
-			label = "image-0-nonsecure";
-			reg = <0x0008A000 DT_SIZE_K(844)>;
-		};
-
-		storage_partition: partition@15D000 {
-			label = "storage";
-			reg = <0x00015D000 DT_SIZE_K(32)>;
-		};
-	};
-};
-
 &uart30 {
 	/* Disable so that TF-M can use this UART */
 	status = "disabled";
@@ -112,3 +67,6 @@
 	pinctrl-1 = <&uart30_sleep>;
 	pinctrl-names = "default", "sleep";
 };
+
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l15_ns_partition.dtsi>
diff --git a/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.dts b/boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.dts
@@ -57,51 +57,6 @@
 	};
 };
 
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
-		 * last 96kB are reserved for the FLPR MCU.
-		 *
-		 * This static layout needs to be the same with the upstream TF-M layout in the
-		 * header flash_layout.h of the relevant platform. Any updates in the layout
-		 * needs to happen both in the flash_layout.h and in this file at the same time.
-		 */
-		slot0_partition: partition@0 {
-			label = "image-0";
-			reg = <0x0000000 DT_SIZE_K(512)>;
-		};
-
-		tfm_ps_partition: partition@80000 {
-			label = "tfm-ps";
-			reg = <0x00080000 DT_SIZE_K(16)>;
-		};
-
-		tfm_its_partition: partition@84000 {
-			label = "tfm-its";
-			reg = <0x00084000 DT_SIZE_K(16)>;
-		};
-
-		tfm_otp_partition: partition@88000 {
-			label = "tfm-otp";
-			reg = <0x00088000 DT_SIZE_K(8)>;
-		};
-
-		slot0_ns_partition: partition@8A000 {
-			label = "image-0-nonsecure";
-			reg = <0x0008A000 DT_SIZE_K(844)>;
-		};
-
-		storage_partition: partition@15D000 {
-			label = "storage";
-			reg = <0x00015D000 DT_SIZE_K(32)>;
-		};
-	};
-};
-
 &uart30 {
 	/* Disable so that TF-M can use this UART */
 	status = "disabled";
@@ -111,3 +66,6 @@
 	pinctrl-1 = <&uart30_sleep>;
 	pinctrl-names = "default", "sleep";
 };
+
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l15_ns_partition.dtsi>
diff --git a/boards/panasonic/panb511evb/panb511evb_nrf54l15_cpuapp_ns.dts b/boards/panasonic/panb511evb/panb511evb_nrf54l15_cpuapp_ns.dts
@@ -57,51 +57,6 @@
 	};
 };
 
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
-		 * last 96kB are reserved for the FLPR MCU.
-		 *
-		 * This static layout needs to be the same with the upstream TF-M layout in the
-		 * header flash_layout.h of the relevant platform. Any updates in the layout
-		 * needs to happen both in the flash_layout.h and in this file at the same time.
-		 */
-		slot0_partition: partition@0 {
-			label = "image-0";
-			reg = <0x0000000 DT_SIZE_K(512)>;
-		};
-
-		tfm_ps_partition: partition@80000 {
-			label = "tfm-ps";
-			reg = <0x00080000 DT_SIZE_K(16)>;
-		};
-
-		tfm_its_partition: partition@84000 {
-			label = "tfm-its";
-			reg = <0x00084000 DT_SIZE_K(16)>;
-		};
-
-		tfm_otp_partition: partition@88000 {
-			label = "tfm-otp";
-			reg = <0x00088000 DT_SIZE_K(8)>;
-		};
-
-		slot0_ns_partition: partition@8A000 {
-			label = "image-0-nonsecure";
-			reg = <0x0008A000 DT_SIZE_K(844)>;
-		};
-
-		storage_partition: partition@15D000 {
-			label = "storage";
-			reg = <0x00015D000 DT_SIZE_K(32)>;
-		};
-	};
-};
-
 &uart20 {
 	/* Disable so that TF-M can use this UART */
 	status = "disabled";
@@ -111,3 +66,6 @@
 	pinctrl-1 = <&uart20_sleep>;
 	pinctrl-names = "default", "sleep";
 };
+
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l15_ns_partition.dtsi>
diff --git a/boards/raytac/an54l15q_db/raytac_an54l15q_db_nrf54l15_cpuapp_ns.dts b/boards/raytac/an54l15q_db/raytac_an54l15q_db_nrf54l15_cpuapp_ns.dts
@@ -58,51 +58,6 @@
 	};
 };
 
-&cpuapp_rram {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
-		 * last 96kB are reserved for the FLPR MCU.
-		 *
-		 * This static layout needs to be the same with the upstream TF-M layout in the
-		 * header flash_layout.h of the relevant platform. Any updates in the layout
-		 * needs to happen both in the flash_layout.h and in this file at the same time.
-		 */
-		slot0_partition: partition@0 {
-			label = "image-0";
-			reg = <0x0000000 DT_SIZE_K(512)>;
-		};
-
-		tfm_ps_partition: partition@80000 {
-			label = "tfm-ps";
-			reg = <0x00080000 DT_SIZE_K(16)>;
-		};
-
-		tfm_its_partition: partition@84000 {
-			label = "tfm-its";
-			reg = <0x00084000 DT_SIZE_K(16)>;
-		};
-
-		tfm_otp_partition: partition@88000 {
-			label = "tfm-otp";
-			reg = <0x00088000 DT_SIZE_K(8)>;
-		};
-
-		slot0_ns_partition: partition@8A000 {
-			label = "image-0-nonsecure";
-			reg = <0x0008A000 DT_SIZE_K(844)>;
-		};
-
-		storage_partition: partition@15D000 {
-			label = "storage";
-			reg = <0x00015D000 DT_SIZE_K(32)>;
-		};
-	};
-};
-
 &uart30 {
 	/* Disable so that TF-M can use this UART */
 	status = "disabled";
@@ -111,3 +66,6 @@
 	pinctrl-1 = <&uart30_sleep>;
 	pinctrl-names = "default", "sleep";
 };
+
+/* Include default memory partition configuration file */
+#include <nordic/nrf54l15_ns_partition.dtsi>
diff --git a/dts/vendor/nordic/nrf54l15_ns_partition.dtsi b/dts/vendor/nordic/nrf54l15_ns_partition.dtsi
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&cpuapp_rram {
+	/*
+	 * Default NVM layout on NRF54L15 Application MCU without BL2:
+	 * This layout matches (by necessity) that in the TF-M repository:
+	 *
+	 * 0x0000_0000 Secure image primary (512 KB)
+	 * 0x0008_0000 Protected Storage Area (16 KB)
+	 * 0x0008_4000 Internal Trusted Storage Area (16 KB)
+	 * 0x0008_8000 OTP / NV counters area (8 KB)
+	 * 0x0008_A000 Non-secure image primary (844 KB)
+	 * 0x0015_D000 Non-secure storage, used when built with NRF_NS_STORAGE=ON,
+	 *             otherwise unused (32 KB)
+	 */
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
+		 * last 96kB are reserved for the FLPR MCU.
+		 *
+		 * This static layout needs to be the same with the upstream TF-M layout in the
+		 * header flash_layout.h of the relevant platform. Any updates in the layout
+		 * needs to happen both in the flash_layout.h and in this file at the same time.
+		 */
+		slot0_partition: partition@0 {
+			label = "image-0";
+			reg = <0x0000000 DT_SIZE_K(512)>;
+		};
+
+		tfm_ps_partition: partition@80000 {
+			label = "tfm-ps";
+			reg = <0x00080000 DT_SIZE_K(16)>;
+		};
+
+		tfm_its_partition: partition@84000 {
+			label = "tfm-its";
+			reg = <0x00084000 DT_SIZE_K(16)>;
+		};
+
+		tfm_otp_partition: partition@88000 {
+			label = "tfm-otp";
+			reg = <0x00088000 DT_SIZE_K(8)>;
+		};
+
+		slot0_ns_partition: partition@8A000 {
+			label = "image-0-nonsecure";
+			reg = <0x0008A000 DT_SIZE_K(844)>;
+		};
+
+		storage_partition: partition@15D000 {
+			label = "storage";
+			reg = <0x00015D000 DT_SIZE_K(32)>;
+		};
+	};
+};
