Skip to content

Commit e2d4b98

Browse files
MulinChaokartben
MulinChao
authored and
kartben
committed
dts: arm: npcx: Add smb-wui prop. to support wake-up from sleep
Add `smb-wui` property to support wake-up from sleep mode by START condition when i2c is configured to target mode. Signed-off-by: Alvis Sun <yfsun@nuvoton.com> Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
1 parent eabef50 commit e2d4b98

File tree

9 files changed

+254
-75
lines changed

9 files changed

+254
-75
lines changed

‎dts/arm/nuvoton/npcx/npcx-miwus-wui-map.dtsi

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -89,12 +89,6 @@
8989
wui_iob0: wui0-4-2 {
9090
miwus = <&miwu0 3 2>; /* GPIOB0 */
9191
};
92-
wui_smb0_2: wui0-4-3 {
93-
miwus = <&miwu0 3 3>; /* SMB0/2 */
94-
};
95-
wui_smb1_3: wui0-4-4 {
96-
miwus = <&miwu0 3 4>; /* SMB1/3 */
97-
};
9892
wui_iob1: wui0-4-5 {
9993
miwus = <&miwu0 3 5>; /* GPIOB1 */
10094
};

‎dts/arm/nuvoton/npcx/npcx.dtsi

Lines changed: 0 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -384,71 +384,6 @@
384384
<&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 7>;
385385
};
386386

387-
/* I2c Controllers - Do not use them as i2c node directly */
388-
i2c_ctrl0: i2c@40009000 {
389-
compatible = "nuvoton,npcx-i2c-ctrl";
390-
reg = <0x40009000 0x1000>;
391-
interrupts = <13 3>;
392-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
393-
status = "disabled";
394-
};
395-
396-
i2c_ctrl1: i2c@4000b000 {
397-
compatible = "nuvoton,npcx-i2c-ctrl";
398-
reg = <0x4000b000 0x1000>;
399-
interrupts = <14 3>;
400-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
401-
status = "disabled";
402-
};
403-
404-
i2c_ctrl2: i2c@400c0000 {
405-
compatible = "nuvoton,npcx-i2c-ctrl";
406-
reg = <0x400c0000 0x1000>;
407-
interrupts = <36 3>;
408-
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
409-
status = "disabled";
410-
};
411-
412-
i2c_ctrl3: i2c@400c2000 {
413-
compatible = "nuvoton,npcx-i2c-ctrl";
414-
reg = <0x400c2000 0x1000>;
415-
interrupts = <37 3>;
416-
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
417-
status = "disabled";
418-
};
419-
420-
i2c_ctrl4: i2c@40008000 {
421-
compatible = "nuvoton,npcx-i2c-ctrl";
422-
reg = <0x40008000 0x1000>;
423-
interrupts = <19 3>;
424-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
425-
status = "disabled";
426-
};
427-
428-
i2c_ctrl5: i2c@40017000 {
429-
compatible = "nuvoton,npcx-i2c-ctrl";
430-
reg = <0x40017000 0x1000>;
431-
interrupts = <20 3>;
432-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
433-
status = "disabled";
434-
};
435-
436-
i2c_ctrl6: i2c@40018000 {
437-
compatible = "nuvoton,npcx-i2c-ctrl";
438-
reg = <0x40018000 0x1000>;
439-
interrupts = <16 3>;
440-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
441-
status = "disabled";
442-
};
443-
444-
i2c_ctrl7: i2c@40019000 {
445-
compatible = "nuvoton,npcx-i2c-ctrl";
446-
reg = <0x40019000 0x1000>;
447-
interrupts = <8 3>;
448-
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
449-
status = "disabled";
450-
};
451-
452387
tach1: tach@400e1000 {
453388
compatible = "nuvoton,npcx-tach";
454389
reg = <0x400e1000 0x2000>;

‎dts/arm/nuvoton/npcx/npcx4.dtsi

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,79 @@
296296
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
297297
};
298298

299+
/* I2c Controllers - Do not use them as i2c node directly */
300+
i2c_ctrl0: i2c@40009000 {
301+
compatible = "nuvoton,npcx-i2c-ctrl";
302+
reg = <0x40009000 0x1000>;
303+
interrupts = <13 3>;
304+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
305+
smb-wui = <&wui_smb0>;
306+
status = "disabled";
307+
};
308+
309+
i2c_ctrl1: i2c@4000b000 {
310+
compatible = "nuvoton,npcx-i2c-ctrl";
311+
reg = <0x4000b000 0x1000>;
312+
interrupts = <14 3>;
313+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
314+
smb-wui = <&wui_smb1>;
315+
status = "disabled";
316+
};
317+
318+
i2c_ctrl2: i2c@400c0000 {
319+
compatible = "nuvoton,npcx-i2c-ctrl";
320+
reg = <0x400c0000 0x1000>;
321+
interrupts = <36 3>;
322+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
323+
smb-wui = <&wui_smb2>;
324+
status = "disabled";
325+
};
326+
327+
i2c_ctrl3: i2c@400c2000 {
328+
compatible = "nuvoton,npcx-i2c-ctrl";
329+
reg = <0x400c2000 0x1000>;
330+
interrupts = <37 3>;
331+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
332+
smb-wui = <&wui_smb3>;
333+
status = "disabled";
334+
};
335+
336+
i2c_ctrl4: i2c@40008000 {
337+
compatible = "nuvoton,npcx-i2c-ctrl";
338+
reg = <0x40008000 0x1000>;
339+
interrupts = <19 3>;
340+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
341+
smb-wui = <&wui_smb4>;
342+
status = "disabled";
343+
};
344+
345+
i2c_ctrl5: i2c@40017000 {
346+
compatible = "nuvoton,npcx-i2c-ctrl";
347+
reg = <0x40017000 0x1000>;
348+
interrupts = <20 3>;
349+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
350+
smb-wui = <&wui_smb5>;
351+
status = "disabled";
352+
};
353+
354+
i2c_ctrl6: i2c@40018000 {
355+
compatible = "nuvoton,npcx-i2c-ctrl";
356+
reg = <0x40018000 0x1000>;
357+
interrupts = <16 3>;
358+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
359+
smb-wui = <&wui_smb6>;
360+
status = "disabled";
361+
};
362+
363+
i2c_ctrl7: i2c@40019000 {
364+
compatible = "nuvoton,npcx-i2c-ctrl";
365+
reg = <0x40019000 0x1000>;
366+
interrupts = <8 3>;
367+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
368+
smb-wui = <&wui_smb7>;
369+
status = "disabled";
370+
};
371+
299372
/* ADC0 comparator configuration in npcx4 series */
300373
adc0: adc@400d1000 {
301374
channel-count = <26>;

‎dts/arm/nuvoton/npcx/npcx4/npcx4-miwus-wui-map.dtsi

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,14 @@
1919
miwus = <&miwu0 7 7>; /* GPIOE7 */
2020
};
2121

22+
/* MIWU group D */
23+
wui_smb0: wui0-4-3 {
24+
miwus = <&miwu0 3 3>; /* SMB0 */
25+
};
26+
wui_smb1: wui0-4-4 {
27+
miwus = <&miwu0 3 4>; /* SMB1 */
28+
};
29+
2230
/* MIWU table 1 */
2331
/* MIWU group B */
2432
wui_io13: wui1-2-3 {
@@ -82,7 +90,7 @@
8290
miwus = <&miwu2 6 7>; /* I3C1_RSTW */
8391
};
8492

85-
/* MIWU group G */
93+
/* MIWU group H */
8694
wui_i3c2_addrw: wui2-8-0 {
8795
miwus = <&miwu2 7 0>; /* I3C2_ADDRW */
8896
};

‎dts/arm/nuvoton/npcx/npcx7.dtsi

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -263,6 +263,79 @@
263263
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
264264
};
265265

266+
/* I2c Controllers - Do not use them as i2c node directly */
267+
i2c_ctrl0: i2c@40009000 {
268+
compatible = "nuvoton,npcx-i2c-ctrl";
269+
reg = <0x40009000 0x1000>;
270+
interrupts = <13 3>;
271+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
272+
smb-wui = <&wui_smb0_2>;
273+
status = "disabled";
274+
};
275+
276+
i2c_ctrl1: i2c@4000b000 {
277+
compatible = "nuvoton,npcx-i2c-ctrl";
278+
reg = <0x4000b000 0x1000>;
279+
interrupts = <14 3>;
280+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
281+
smb-wui = <&wui_smb1_3>;
282+
status = "disabled";
283+
};
284+
285+
i2c_ctrl2: i2c@400c0000 {
286+
compatible = "nuvoton,npcx-i2c-ctrl";
287+
reg = <0x400c0000 0x1000>;
288+
interrupts = <36 3>;
289+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
290+
smb-wui = <&wui_smb0_2>;
291+
status = "disabled";
292+
};
293+
294+
i2c_ctrl3: i2c@400c2000 {
295+
compatible = "nuvoton,npcx-i2c-ctrl";
296+
reg = <0x400c2000 0x1000>;
297+
interrupts = <37 3>;
298+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
299+
smb-wui = <&wui_smb1_3>;
300+
status = "disabled";
301+
};
302+
303+
i2c_ctrl4: i2c@40008000 {
304+
compatible = "nuvoton,npcx-i2c-ctrl";
305+
reg = <0x40008000 0x1000>;
306+
interrupts = <19 3>;
307+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
308+
smb-wui = <&wui_smb4>;
309+
status = "disabled";
310+
};
311+
312+
i2c_ctrl5: i2c@40017000 {
313+
compatible = "nuvoton,npcx-i2c-ctrl";
314+
reg = <0x40017000 0x1000>;
315+
interrupts = <20 3>;
316+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
317+
smb-wui = <&wui_smb5>;
318+
status = "disabled";
319+
};
320+
321+
i2c_ctrl6: i2c@40018000 {
322+
compatible = "nuvoton,npcx-i2c-ctrl";
323+
reg = <0x40018000 0x1000>;
324+
interrupts = <16 3>;
325+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
326+
smb-wui = <&wui_smb6>;
327+
status = "disabled";
328+
};
329+
330+
i2c_ctrl7: i2c@40019000 {
331+
compatible = "nuvoton,npcx-i2c-ctrl";
332+
reg = <0x40019000 0x1000>;
333+
interrupts = <8 3>;
334+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
335+
smb-wui = <&wui_smb7>;
336+
status = "disabled";
337+
};
338+
266339
/* ADC0 comparator configuration in npcx7 series */
267340
adc0: adc@400d1000 {
268341
channel-count = <10>;

‎dts/arm/nuvoton/npcx/npcx7/npcx7-miwus-wui-map.dtsi

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,12 +18,18 @@
1818
wui_cr_sin2: wui0-1-6-2 {
1919
miwus = <&miwu0 0 6>; /* CR_SIN2 */
2020
};
21-
22-
/* MIWU group A */
2321
wui_io86: wui0-1-6 {
2422
miwus = <&miwu0 0 6>; /* GPIO86 */
2523
};
2624

25+
/* MIWU group D */
26+
wui_smb0_2: wui0-4-3 {
27+
miwus = <&miwu0 3 3>; /* SMB0/2 */
28+
};
29+
wui_smb1_3: wui0-4-4 {
30+
miwus = <&miwu0 3 4>; /* SMB1/3 */
31+
};
32+
2733
/* MIWU group G */
2834
wui_iod7: wui0-7-6 {
2935
miwus = <&miwu0 6 6>; /* GPIOD7 */

‎dts/arm/nuvoton/npcx/npcx9.dtsi

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,79 @@
296296
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
297297
};
298298

299+
/* I2c Controllers - Do not use them as i2c node directly */
300+
i2c_ctrl0: i2c@40009000 {
301+
compatible = "nuvoton,npcx-i2c-ctrl";
302+
reg = <0x40009000 0x1000>;
303+
interrupts = <13 3>;
304+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
305+
smb-wui = <&wui_smb0_2>;
306+
status = "disabled";
307+
};
308+
309+
i2c_ctrl1: i2c@4000b000 {
310+
compatible = "nuvoton,npcx-i2c-ctrl";
311+
reg = <0x4000b000 0x1000>;
312+
interrupts = <14 3>;
313+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
314+
smb-wui = <&wui_smb1_3>;
315+
status = "disabled";
316+
};
317+
318+
i2c_ctrl2: i2c@400c0000 {
319+
compatible = "nuvoton,npcx-i2c-ctrl";
320+
reg = <0x400c0000 0x1000>;
321+
interrupts = <36 3>;
322+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
323+
smb-wui = <&wui_smb0_2>;
324+
status = "disabled";
325+
};
326+
327+
i2c_ctrl3: i2c@400c2000 {
328+
compatible = "nuvoton,npcx-i2c-ctrl";
329+
reg = <0x400c2000 0x1000>;
330+
interrupts = <37 3>;
331+
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
332+
smb-wui = <&wui_smb1_3>;
333+
status = "disabled";
334+
};
335+
336+
i2c_ctrl4: i2c@40008000 {
337+
compatible = "nuvoton,npcx-i2c-ctrl";
338+
reg = <0x40008000 0x1000>;
339+
interrupts = <19 3>;
340+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
341+
smb-wui = <&wui_smb4>;
342+
status = "disabled";
343+
};
344+
345+
i2c_ctrl5: i2c@40017000 {
346+
compatible = "nuvoton,npcx-i2c-ctrl";
347+
reg = <0x40017000 0x1000>;
348+
interrupts = <20 3>;
349+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
350+
smb-wui = <&wui_smb5>;
351+
status = "disabled";
352+
};
353+
354+
i2c_ctrl6: i2c@40018000 {
355+
compatible = "nuvoton,npcx-i2c-ctrl";
356+
reg = <0x40018000 0x1000>;
357+
interrupts = <16 3>;
358+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
359+
smb-wui = <&wui_smb6>;
360+
status = "disabled";
361+
};
362+
363+
i2c_ctrl7: i2c@40019000 {
364+
compatible = "nuvoton,npcx-i2c-ctrl";
365+
reg = <0x40019000 0x1000>;
366+
interrupts = <8 3>;
367+
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
368+
smb-wui = <&wui_smb7>;
369+
status = "disabled";
370+
};
371+
299372
/* ADC0 comparator configuration in npcx9 series */
300373
adc0: adc@400d1000 {
301374
channel-count = <12>;

‎dts/arm/nuvoton/npcx/npcx9/npcx9-miwus-wui-map.dtsi

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,21 @@
1313
npcx-miwus-wui-map {
1414
compatible = "nuvoton,npcx-miwu-wui-map";
1515

16-
/* MIWU table 1 */
16+
/* MIWU table 0 */
1717
/* MIWU group A */
1818
wui_cr_sin2: wui0-1-6-2 {
1919
miwus = <&miwu0 0 6>; /* CR_SIN2 */
2020
};
2121

22+
/* MIWU group D */
23+
wui_smb0_2: wui0-4-3 {
24+
miwus = <&miwu0 3 3>; /* SMB0/2 */
25+
};
26+
wui_smb1_3: wui0-4-4 {
27+
miwus = <&miwu0 3 4>; /* SMB1/3 */
28+
};
29+
30+
/* MIWU table 1 */
2231
/* MIWU group G */
2332
wui_io66: wui1-7-6 {
2433
miwus = <&miwu1 6 6>; /* GPIO66 */

0 commit comments

Comments
 (0)