@@ -73,6 +73,12 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
73
73
#define IS_ETH_DMATXDESC_OWN (dma_tx_desc ) (dma_tx_desc->DESC3 & \
74
74
ETH_DMATXNDESCRF_OWN)
75
75
76
+ #define ETH_RXBUFNB ETH_RX_DESC_CNT
77
+ #define ETH_TXBUFNB ETH_TX_DESC_CNT
78
+
79
+ #define ETH_MEDIA_INTERFACE_MII HAL_ETH_MII_MODE
80
+ #define ETH_MEDIA_INTERFACE_RMII HAL_ETH_RMII_MODE
81
+
76
82
/* Only one tx_buffer is sufficient to pass only 1 dma_buffer */
77
83
#define ETH_TXBUF_DEF_NB 1U
78
84
#else
@@ -99,14 +105,14 @@ static const struct device *eth_stm32_phy_dev = DEVICE_PHY_BY_NAME(0);
99
105
#define __eth_stm32_buf __aligned(4)
100
106
#endif
101
107
102
- static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RX_DESC_CNT ] __eth_stm32_desc ;
103
- static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TX_DESC_CNT ] __eth_stm32_desc ;
104
- static uint8_t dma_rx_buffer [ETH_RX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
105
- static uint8_t dma_tx_buffer [ETH_TX_DESC_CNT ][ ETH_MAX_PACKET_SIZE ] __eth_stm32_buf ;
108
+ static ETH_DMADescTypeDef dma_rx_desc_tab [ETH_RXBUFNB ] __eth_stm32_desc ;
109
+ static ETH_DMADescTypeDef dma_tx_desc_tab [ETH_TXBUFNB ] __eth_stm32_desc ;
110
+ static uint8_t dma_rx_buffer [ETH_RXBUFNB ][ ETH_STM32_RX_BUF_SIZE ] __eth_stm32_buf ;
111
+ static uint8_t dma_tx_buffer [ETH_TXBUFNB ][ ETH_STM32_TX_BUF_SIZE ] __eth_stm32_buf ;
106
112
107
113
#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
108
114
109
- BUILD_ASSERT (ETH_MAX_PACKET_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
115
+ BUILD_ASSERT (ETH_STM32_RX_BUF_SIZE % 4 == 0 , "Rx buffer size must be a multiple of 4" );
110
116
111
117
struct eth_stm32_rx_buffer_header {
112
118
struct eth_stm32_rx_buffer_header * next ;
@@ -125,13 +131,13 @@ struct eth_stm32_tx_context {
125
131
bool used ;
126
132
};
127
133
128
- static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RX_DESC_CNT ];
129
- static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TX_DESC_CNT ];
134
+ static struct eth_stm32_rx_buffer_header dma_rx_buffer_header [ETH_RXBUFNB ];
135
+ static struct eth_stm32_tx_buffer_header dma_tx_buffer_header [ETH_TXBUFNB ];
130
136
static struct eth_stm32_tx_context dma_tx_context [ETH_TX_DESC_CNT ];
131
137
132
138
void HAL_ETH_RxAllocateCallback (uint8_t * * buf )
133
139
{
134
- for (size_t i = 0 ; i < ETH_RX_DESC_CNT ; ++ i ) {
140
+ for (size_t i = 0 ; i < ETH_RXBUFNB ; ++ i ) {
135
141
if (!dma_rx_buffer_header [i ].used ) {
136
142
dma_rx_buffer_header [i ].next = NULL ;
137
143
dma_rx_buffer_header [i ].size = 0 ;
@@ -143,8 +149,8 @@ void HAL_ETH_RxAllocateCallback(uint8_t **buf)
143
149
* buf = NULL ;
144
150
}
145
151
146
- /* Pointer to an array of ETH_MAX_PACKET_SIZE uint8_t's */
147
- typedef uint8_t (* RxBufferPtr )[ETH_MAX_PACKET_SIZE ];
152
+ /* Pointer to an array of ETH_STM32_RX_BUF_SIZE uint8_t's */
153
+ typedef uint8_t (* RxBufferPtr )[ETH_STM32_RX_BUF_SIZE ];
148
154
149
155
/* called by HAL_ETH_ReadData() */
150
156
void HAL_ETH_RxLinkCallback (void * * pStart , void * * pEnd , uint8_t * buff , uint16_t Length )
@@ -155,7 +161,7 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
155
161
size_t index = (RxBufferPtr )buff - & dma_rx_buffer [0 ];
156
162
struct eth_stm32_rx_buffer_header * header = & dma_rx_buffer_header [index ];
157
163
158
- __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
164
+ __ASSERT_NO_MSG (index < ETH_RXBUFNB );
159
165
160
166
header -> size = Length ;
161
167
@@ -197,7 +203,7 @@ void HAL_ETH_TxFreeCallback(uint32_t *buff)
197
203
static inline uint16_t allocate_tx_buffer (void )
198
204
{
199
205
for (;;) {
200
- for (uint16_t index = 0 ; index < ETH_TX_DESC_CNT ; index ++ ) {
206
+ for (uint16_t index = 0 ; index < ETH_TXBUFNB ; index ++ ) {
201
207
if (!dma_tx_buffer_header [index ].used ) {
202
208
dma_tx_buffer_header [index ].used = true;
203
209
return index ;
@@ -342,7 +348,7 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
342
348
heth = & dev_data -> heth ;
343
349
344
350
total_len = net_pkt_get_len (pkt );
345
- if (total_len > (ETH_MAX_PACKET_SIZE * ETH_TX_DESC_CNT )) {
351
+ if (total_len > (ETH_STM32_TX_BUF_SIZE * ETH_TXBUFNB )) {
346
352
LOG_ERR ("PKT too big" );
347
353
return - EIO ;
348
354
}
@@ -375,19 +381,19 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
375
381
#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
376
382
remaining_read = total_len ;
377
383
/* fill and allocate buffer until remaining data fits in one buffer */
378
- while (remaining_read > ETH_MAX_PACKET_SIZE ) {
379
- if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_MAX_PACKET_SIZE )) {
384
+ while (remaining_read > ETH_STM32_TX_BUF_SIZE ) {
385
+ if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , ETH_STM32_TX_BUF_SIZE )) {
380
386
res = - ENOBUFS ;
381
387
goto error ;
382
388
}
383
389
const uint16_t next_buffer_id = allocate_tx_buffer ();
384
390
385
- buf_header -> tx_buff .len = ETH_MAX_PACKET_SIZE ;
391
+ buf_header -> tx_buff .len = ETH_STM32_TX_BUF_SIZE ;
386
392
/* append new buffer to the linked list */
387
393
buf_header -> tx_buff .next = & dma_tx_buffer_header [next_buffer_id ].tx_buff ;
388
394
/* and adjust tail pointer */
389
395
buf_header = & dma_tx_buffer_header [next_buffer_id ];
390
- remaining_read -= ETH_MAX_PACKET_SIZE ;
396
+ remaining_read -= ETH_STM32_TX_BUF_SIZE ;
391
397
}
392
398
if (net_pkt_read (pkt , buf_header -> tx_buff .buffer , remaining_read )) {
393
399
res = - ENOBUFS ;
@@ -626,7 +632,7 @@ static struct net_pkt *eth_rx(const struct device *dev)
626
632
rx_header ; rx_header = rx_header -> next ) {
627
633
const size_t index = rx_header - & dma_rx_buffer_header [0 ];
628
634
629
- __ASSERT_NO_MSG (index < ETH_RX_DESC_CNT );
635
+ __ASSERT_NO_MSG (index < ETH_RXBUFNB );
630
636
if (net_pkt_write (pkt , dma_rx_buffer [index ], rx_header -> size )) {
631
637
LOG_ERR ("Failed to append RX buffer to context buffer" );
632
638
net_pkt_unref (pkt );
@@ -963,7 +969,7 @@ static int eth_initialize(const struct device *dev)
963
969
#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
964
970
heth -> Init .TxDesc = dma_tx_desc_tab ;
965
971
heth -> Init .RxDesc = dma_rx_desc_tab ;
966
- heth -> Init .RxBuffLen = ETH_MAX_PACKET_SIZE ;
972
+ heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
967
973
#endif /* CONFIG_ETH_STM32_HAL_API_V2 */
968
974
969
975
hal_ret = HAL_ETH_Init (heth );
@@ -1029,16 +1035,16 @@ static int eth_initialize(const struct device *dev)
1029
1035
#if defined(CONFIG_ETH_STM32_HAL_API_V2 )
1030
1036
1031
1037
/* prepare tx buffer header */
1032
- for (uint16_t i = 0 ; i < ETH_TX_DESC_CNT ; ++ i ) {
1038
+ for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
1033
1039
dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
1034
1040
}
1035
1041
1036
1042
hal_ret = HAL_ETH_Start_IT (heth );
1037
1043
#else
1038
1044
HAL_ETH_DMATxDescListInit (heth , dma_tx_desc_tab ,
1039
- & dma_tx_buffer [0 ][0 ], ETH_TX_DESC_CNT );
1045
+ & dma_tx_buffer [0 ][0 ], ETH_TXBUFNB );
1040
1046
HAL_ETH_DMARxDescListInit (heth , dma_rx_desc_tab ,
1041
- & dma_rx_buffer [0 ][0 ], ETH_RX_DESC_CNT );
1047
+ & dma_rx_buffer [0 ][0 ], ETH_RXBUFNB );
1042
1048
1043
1049
hal_ret = HAL_ETH_Start (heth );
1044
1050
#endif /* CONFIG_ETH_STM32_HAL_API_V2 */
@@ -1325,14 +1331,14 @@ static struct eth_stm32_hal_dev_data eth0_data = {
1325
1331
ETH_CHECKSUM_BY_HARDWARE : ETH_CHECKSUM_BY_SOFTWARE ,
1326
1332
#endif /* !CONFIG_SOC_SERIES_STM32H7X */
1327
1333
.MediaInterface = IS_ENABLED (CONFIG_ETH_STM32_HAL_MII ) ?
1328
- HAL_ETH_MII_MODE : HAL_ETH_RMII_MODE ,
1334
+ ETH_MEDIA_INTERFACE_MII : ETH_MEDIA_INTERFACE_RMII ,
1329
1335
},
1330
1336
},
1331
1337
};
1332
1338
1333
1339
ETH_NET_DEVICE_DT_INST_DEFINE (0 , eth_initialize ,
1334
1340
NULL , & eth0_data , & eth0_config ,
1335
- CONFIG_ETH_INIT_PRIORITY , & eth_api , NET_ETH_MTU );
1341
+ CONFIG_ETH_INIT_PRIORITY , & eth_api , ETH_STM32_HAL_MTU );
1336
1342
1337
1343
#if defined(CONFIG_PTP_CLOCK_STM32_HAL )
1338
1344
0 commit comments