dts: arm: nxp: Added flexio pwm to dts

Updated the nxp_mcxw7x dts to include a
flexio_pwm node.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>

Author: EmilioCBen

drivers/clock_control/clock_control_mcux_scg_k4.c

@@ -64,6 +64,9 @@ static int mcux_scg_k4_get_rate(const struct device *dev, clock_control_subsys_t
 	case SCG_K4_RTCOSC_CLK:
 		clock_name = kCLOCK_RtcOscClk;
 		break;
+	case SCG_K4_FLEXIO_CLK:
+		*rate = CLOCK_GetIpFreq(kCLOCK_Flexio0);
+		return 0;
 	default:
 		LOG_ERR("Unsupported clock name");
 		return -EINVAL;

dts/arm/nxp/nxp_mcxw7x_common.dtsi

@@ -351,6 +351,21 @@
 		interrupts = <18 0>;
 		clk-divider = <0x0>;
 	};
+
+	flexio: flexio@3a000 {
+		compatible = "nxp,flexio";
+		reg = <0x3a000 0x920>;
+		interrupts = <46 0>;
+		clocks = <&scg SCG_K4_FLEXIO_CLK 0xe8>;
+		status = "disabled";
+
+		flexio_pwm {
+			compatible = "nxp,flexio-pwm";
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+	};
+
 };
 
 &fast_peripheral0 {

include/zephyr/dt-bindings/clock/scg_k4.h

@@ -14,5 +14,6 @@
 #define SCG_K4_SIRC_CLK    6U
 #define SCG_K4_FIRC_CLK    7U
 #define SCG_K4_RTCOSC_CLK  8U
+#define SCG_K4_FLEXIO_CLK  9U
 
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_SCG_K4_H_ */

soc/nxp/mcx/mcxw/soc.c

@@ -131,6 +131,8 @@ __weak void clock_init(void)
 	CLOCK_SetIpSrc(kCLOCK_Lpspi1, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrc(kCLOCK_Lpadc0, kCLOCK_IpSrcFro192M);
 	CLOCK_SetIpSrcDiv(kCLOCK_Lpadc0, kSCG_SysClkDivBy10);
+	CLOCK_SetIpSrc(kCLOCK_Flexio0, kCLOCK_IpSrcFro192M);
+	CLOCK_SetIpSrcDiv(kCLOCK_Flexio0, kSCG_SysClkDivBy6);
 
 	/* Ungate clocks if the peripheral is enabled in devicetree */
 	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(gpioa), nxp_kinetis_gpio, okay)) {
@@ -192,6 +194,10 @@ __weak void clock_init(void)
 	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(ewm0), nxp_ewm, okay)) {
 		CLOCK_EnableClock(kCLOCK_Ewm0);
 	}
+
+	if (DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexio), nxp_flexio, okay)) {
+		CLOCK_EnableClock(kCLOCK_Flexio0);
+	}
 }
 
 static void vbat_init(void)