xtensa: userspace: workaround return PC calc with loops

When syscall assembly is executed, the EPC points to the syscall
instruction, and we have to manually advance it so we will
return to the instruction after syscall to continue execution.
However, with zero-overhead loops and the syscall instruction is
the last instruction, this simple addition does not work as it
would point past the loop and would have skipped the loop.
Because of this, syscall entrance would need to look at the loop
registers and set the PC back to the beginning of loop if we are
still looping. Assuming most of the syscalls are not inside
loops, the extra handling code consumes quite a few cycles.
To workaround this, simply adds a nop after syscall so we no
longer have to deal with loops at syscall entrance, and that
a nop is faster than all the code to manipulate loop registers.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>

Author: dcpleung

arch/xtensa/core/syscall_helper.c

@@ -25,7 +25,7 @@ uintptr_t xtensa_syscall_helper_args_6(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a8 __asm__("%a8") = arg5;
 	register uintptr_t a9 __asm__("%a9") = arg6;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5), "r" (a8), "r" (a9)
@@ -45,7 +45,7 @@ uintptr_t xtensa_syscall_helper_args_5(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a5 __asm__("%a5") = arg4;
 	register uintptr_t a8 __asm__("%a8") = arg5;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5), "r" (a8)
@@ -64,7 +64,7 @@ uintptr_t xtensa_syscall_helper_args_4(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a4 __asm__("%a4") = arg3;
 	register uintptr_t a5 __asm__("%a5") = arg4;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5)

arch/xtensa/core/userspace.S

@@ -78,33 +78,12 @@ _not_checking_user_context:
 	/* Manipulate PC where we will return to after syscall.
 	 * This is needed as syscall will stash the PC where
 	 * the syscall instruction locates, instead of
-	 * the instruction after it.
+	 * the instruction after it. We need to increment it to
+	 * execute the next instruction when we return.
+	 * The instruction size is 3 bytes, so lets just add it.
 	 */
 	rsr.epc1 a3
-#if XCHAL_HAVE_LOOPS
-	/* If the syscall instruction was the last instruction in the body of
-	 * a zero-overhead loop, and the loop will execute again, decrement
-	 * the loop count and resume execution at the head of the loop.
-	 */
-	rsr.lend a2
 	addi a3, a3, 3
-	bne a2, a3, end_loop
-	rsr.lcount a2
-	beqz a2, end_loop
-	addi a2, a2, -1
-	wsr.lcount a2
-	rsr.lbeg a3
-
-	/* Make sure WSR above is synced before RSR in ODD_REG_SAVE. */
-	isync
-end_loop:
-#else
-	/* EPC1 (and now a3) contains the address that invoked syscall.
-	 * We need to increment it to execute the next instruction when
-	 * we return. The instruction size is 3 bytes, so lets just add it.
-	 */
-	addi a3, a3, 3
-#endif
 	s32i a3, a0, ___xtensa_irq_bsa_t_pc_OFFSET
 
 	/* Need to setup PS so we can spill all registers.

include/zephyr/arch/xtensa/syscall.h

@@ -30,6 +30,26 @@
 extern "C" {
 #endif
 
+/* When syscall assembly is executed, the EPC points to the syscall
+ * instruction, and we have to manually advance it so we will
+ * return to the instruction after syscall to continue execution.
+ * However, with zero-overhead loops and the syscall instruction is
+ * the last instruction, this simple addition does not work as it
+ * would point past the loop and would have skipped the loop.
+ * Because of this, syscall entrance would need to look at the loop
+ * registers and set the PC back to the beginning of loop if we are
+ * still looping. Assuming most of the syscalls are not inside
+ * loops, the extra handling code consumes quite a few cycles.
+ * To workaround this, simply adds a nop after syscall so we no
+ * longer have to deal with loops at syscall entrance, and that
+ * a nop is faster than all the code to manipulate loop registers.
+ */
+#ifdef XCHAL_HAVE_LOOPS
+#define XTENSA_SYSCALL_ASM		"syscall; nop;"
+#else
+#define XTENSA_SYSCALL_ASM		"syscall"
+#endif
+
 #ifdef CONFIG_XTENSA_SYSCALL_USE_HELPER
 uintptr_t xtensa_syscall_helper_args_6(uintptr_t arg1, uintptr_t arg2,
 				       uintptr_t arg3, uintptr_t arg4,
@@ -75,7 +95,7 @@ static SYSINL uintptr_t arch_syscall_invoke6(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a8 __asm__("%a8") = arg5;
 	register uintptr_t a9 __asm__("%a9") = arg6;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5), "r" (a8), "r" (a9)
@@ -99,7 +119,7 @@ static SYSINL uintptr_t arch_syscall_invoke5(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a5 __asm__("%a5") = arg4;
 	register uintptr_t a8 __asm__("%a8") = arg5;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5), "r" (a8)
@@ -122,7 +142,7 @@ static SYSINL uintptr_t arch_syscall_invoke4(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a4 __asm__("%a4") = arg3;
 	register uintptr_t a5 __asm__("%a5") = arg4;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4),
 			   "r" (a5)
@@ -140,7 +160,7 @@ static inline uintptr_t arch_syscall_invoke3(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a3 __asm__("%a3") = arg2;
 	register uintptr_t a4 __asm__("%a4") = arg3;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3), "r" (a4)
 			 : "memory");
@@ -155,7 +175,7 @@ static inline uintptr_t arch_syscall_invoke2(uintptr_t arg1, uintptr_t arg2,
 	register uintptr_t a6 __asm__("%a6") = arg1;
 	register uintptr_t a3 __asm__("%a3") = arg2;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6), "r" (a3)
 			 : "memory");
@@ -168,7 +188,7 @@ static inline uintptr_t arch_syscall_invoke1(uintptr_t arg1, uintptr_t call_id)
 	register uintptr_t a2 __asm__("%a2") = call_id;
 	register uintptr_t a6 __asm__("%a6") = arg1;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2), "r" (a6)
 			 : "memory");
@@ -180,7 +200,7 @@ static inline uintptr_t arch_syscall_invoke0(uintptr_t call_id)
 {
 	register uintptr_t a2 __asm__("%a2") = call_id;
 
-	__asm__ volatile("syscall\n\t"
+	__asm__ volatile(XTENSA_SYSCALL_ASM
 			 : "=r" (a2)
 			 : "r" (a2)
 			 : "memory");