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boards: variscite: Add Variscite DART-MX93 board
Add Variscite DART-MX93 board support. This SoM is based on NXP's i.MX93 SoC. It includes Cortex-A55 and Cortex-M33 support. Signed-off-by: Andre Morishita <andre.m@variscite.com>
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‎boards/variscite/imx93_var_dart/Kconfig.imx93_var_dart

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# Copyright 2025 Variscite Ltd.
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# Copyright 2022,2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_IMX93_VAR_DART
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select SOC_MIMX9352_A55 if BOARD_IMX93_VAR_DART_MIMX9352_A55
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select SOC_MIMX9352_M33 if BOARD_IMX93_VAR_DART_MIMX9352_M33
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select SOC_PART_NUMBER_MIMX9352DVVXM

‎boards/variscite/imx93_var_dart/board.cmake

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# Copyright 2025 Variscite Ltd.
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_SOC_MIMX9352_M33)
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board_set_debugger_ifnset(jlink)
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board_set_flasher_ifnset(jlink)
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board_runner_args(jlink "--device=MIMX9352_M33")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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endif()

‎boards/variscite/imx93_var_dart/board.yml

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boards:
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- name: imx93_var_dart
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full_name: DART-MX93
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vendor: variscite
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socs:
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- name: mimx9352

‎boards/variscite/imx93_var_dart/doc/imx93_var_dart.webp

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‎boards/variscite/imx93_var_dart/doc/index.rst

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.. zephyr:board:: imx93_var_dart
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Overview
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********
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The DART-MX93 offers a high-performance processing for a low-power System-on-Module.
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The product is based on the i.MX 93 family which represents NXP’s latest power-optimized
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processors for smart home, building control, contactless HMI, IoT edge, and Industrial
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applications.
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The i.MX 93 includes powerful dual Arm® Cortex®-A55 processors with speeds up to 1.7 GHz
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integrated with a NPU that accelerates machine learning inference. A general-purpose Arm®
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Cortex®-M33 running up to 250 MHz is for real-time and low-power processing. Robust control
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networks are possible via CAN-FD interface. Also, dual 1 Gbps Ethernet controllers, one
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supporting Time Sensitive Networking (TSN), drive gateway applications with low latency.
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Zephyr OS is ported to run on either the Cortex®-A55 or the Cortex®-M33.
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Specs Summary
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*************
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- CPU
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- NXP i.MX 93:
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- 2x Cortex®-A55 @ 1.7GHz
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- 1x Cortex®-M33 @ 250 MHz
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- 1x Ethos-U65 microNPU 0.5 TOPS
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- Memory
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- Up to 2GB LPDDR4 RAM
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- GPU
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- PXP 2D Pixel acceleration engine
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- NPU (Neural Processing Unit)
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- Neural Network performance (256 MACs operating up to 1.0 GHz and 2 OPS/MAC)
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- NPU targets 8-bit and 16-bit integer RNN
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- Handles 8-bit weights
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- Display
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- LVDS up to 1366x768p60 or 1280x800p60
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- Parallel RGB up to 1366x768p60 or 1280x800p60
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- 1x MIPI DSI up to 1920x1200p60 24-bit
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- Network
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- 2x 10/100/1000 Mbit/s Ethernet Interface
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- Certified Wi-Fi 802.11ax/ac/a/b/g/n
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- Bluetooth/BLE 5.4
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- Camera
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- One 2-lane MIPI CSI-2 camera input
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- Audio
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- Headphones
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- Microphone: Digital, Analog (stereo)
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- 3x I2S(SAI), S/PDIF, PDM 4CH
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- USB
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- 2x USB 2.0 OTG
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- Serial interfaces
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- SPI: x7
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- I2C: x7
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- UART: x7, up to 5 Mbps
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- CAN: x2
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- Temperature range
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- -40°C to 85°C
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More information about the SoM can be found at the
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`Variscite Wiki`_ and
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`Variscite website`_.
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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.. note::
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It is recommended to disable peripherals used by the M33 core on the Linux host.
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Devices
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========
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System Clock
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------------
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This board configuration uses a system clock frequency of 24 MHz.
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Cortex-A55 Core runs up to 1.7 GHz.
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Cortex-M33 Core runs up to 200MHz in which SYSTICK runs on same frequency.
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Serial Port
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-----------
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This board configuration uses a single serial communication channel with the
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CPU's UART7 for A55 core and M33 core.
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Programming and Debugging (A55)
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*******************************
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Copy the compiled ``zephyr.bin`` to the boot directory of the SD card and
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plug the SD card into the board. Power it up and stop the U-Boot execution at
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prompt.
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Use U-Boot to load and run zephyr.bin on the Cortex-A55:
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.. code-block:: console
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load mmc $mmcdev:$mmcpart $loadaddr /boot/zephyr.bin
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dcache off; icache flush; go $loadaddr
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Use this configuration to run basic Zephyr applications and kernel tests,
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for example, with the :zephyr:code-sample:`hello_world` sample:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:host-os: unix
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:board: imx93_var_dart/mimx9352/a55
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:goals: build
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This will build an image with the hello_world sample app. When loaded and executed
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it will display the following ram console output:
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.. code-block:: console
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*** Booting Zephyr OS build v4.0.0-44-g93cbaccbbc41 ***
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Hello World! imx93_var_dart/mimx9352/a55
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Programming and Debugging (M33)
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*******************************
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.. zephyr:board-supported-runners::
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There are two methods to load M33 Core images: U-Boot command and Linux remoteproc.
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Load and Run M33 Zephyr Image from U-Boot
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=========================================
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Load and run Zephyr on M33 from A55 using U-Boot by copying the compiled
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``zephyr.bin`` to the boot directory of the SD card and plug the SD
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card into the board. Power it up and stop the U-Boot execution at prompt.
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Load the M33 binary onto the desired memory and start its execution using:
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.. code-block:: console
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load mmc $mmcdev:$mmcpart 0x80000000 /boot/zephyr.bin
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cp.b 0x80000000 0x201e0000 0x30000
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bootaux 0x1ffe0000 0
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Load and Run M33 Zephyr Image by using Linux remoteproc
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=======================================================
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Transfer built binaries ``zephyr.bin`` and ``zephyr.elf`` to the SoM's ``/boot`` and
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``/lib/firmware`` respectively using ``scp`` or through an USB drive.
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Before running Cortex-M33 binaries from Linux it is necessary to enable the device tree
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dedicated to be used with Cortex-M33 applications:
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.. code-block:: console
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root@imx93-var-som:~# fw_setenv fdt_file imx93-var-dart-dt8mcustomboard-m33.dtb
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root@imx93-var-som:~# reboot
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It is possible to execute Zephyr binaries using Variscite remoteproc scripts made
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for MCUXpresso binaries:
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.. code-block:: console
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root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-linux -f /lib/firmware/zephyr.elf
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[ 125.449838] remoteproc remoteproc0: powering up imx-rproc
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[ 125.459162] remoteproc remoteproc0: Booting fw image zephyr.elf, size 469356
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[ 125.468958] remoteproc remoteproc0: No resource table in elf
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[ 125.987142] remoteproc remoteproc0: remote processor imx-rproc is now up
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Which should yield the following result on the UART7 serial console:
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.. code-block:: console
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*** Booting Zephyr OS build v4.0.0-44-g93cbaccbbc41 ***
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Hello World! imx93_var_dart/mimx9352/m33
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You can also configure U-Boot to load firmware on boot:
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.. code-block:: console
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root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-u-boot -f /boot/zephyr.bin
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Configuring for TCM memory
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+ fw_setenv m33_addr 0x201E0000
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+ fw_setenv fdt_file imx93-var-dart-dt8mcustomboard-m33.dtb
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+ fw_setenv use_m33 yes
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+ fw_setenv m33_bin zephyr.bin
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Finished: Please reboot, the m33 firmware will run during U-Boot
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For more information about Variscite remoteproc scripts and general Cortex-M33
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support, visit `Variscite Wiki`_.
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References
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==========
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- `Variscite Wiki`_
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- `Variscite website`_
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- `NXP website`_
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.. _Variscite Wiki:
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https://variwiki.com/index.php?title=DART-MX93
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.. _Variscite website:
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https://www.variscite.com/product/system-on-module-som/cortex-a55/dart-mx93-nxp-i-mx93/
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.. _NXP website:
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https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-9-processors/i-mx-93-applications-processor-family-arm-cortex-a55-ml-acceleration-power-efficient-mpu:i.MX93

‎boards/variscite/imx93_var_dart/imx93_var_dart-m33-common.dtsi

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/*
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* Copyright 2025 Variscite Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <nxp/nxp_imx93_m33.dtsi>
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/ {
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soc {
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lpuart7: serial@42690000 {
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compatible = "nxp,imx-lpuart", "nxp,lpuart";
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reg = <0x42690000 DT_SIZE_K(64)>;
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interrupts = <20 3>;
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clocks = <&ccm IMX_CCM_LPUART7_CLK 0x6c 24>;
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status = "disabled";
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};
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};
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};

‎boards/variscite/imx93_var_dart/imx93_var_dart-pinctrl.dtsi

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/*
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* Copyright 2025 Variscite Ltd.
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* Copyright 2022,2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*
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*/
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#include <nxp/nxp_imx/mimx9352cvuxk-pinctrl.dtsi>
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&pinctrl {
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uart1_default: uart1_default {
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group0 {
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pinmux = <&iomuxc1_uart1_rxd_lpuart_rx_lpuart1_rx>,
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<&iomuxc1_uart1_txd_lpuart_tx_lpuart1_tx>;
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bias-pull-up;
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slew-rate = "slightly_fast";
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drive-strength = "x5";
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};
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};
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uart7_default: uart7_default {
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group0 {
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pinmux = <&iomuxc1_gpio_io09_lpuart_rx_lpuart7_rx>,
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<&iomuxc1_gpio_io08_lpuart_tx_lpuart7_tx>;
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bias-pull-up;
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slew-rate = "slightly_fast";
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drive-strength = "x5";
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};
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};
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};

‎boards/variscite/imx93_var_dart/imx93_var_dart_mimx9352_a55.dts

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/*
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* Copyright 2025 Variscite Ltd.
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* Copyright 2022,2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <nxp/nxp_mimx93_a55.dtsi>
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#include "imx93_var_dart-pinctrl.dtsi"
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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model = "Variscite DART-MX93 A55";
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compatible = "fsl,mimx93";
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chosen {
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zephyr,console = &lpuart7;
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zephyr,shell-uart = &lpuart7;
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zephyr,sram = &sram0;
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};
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cpus {
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cpu@0 {
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status = "disabled";
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};
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};
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sram0: memory@80400000 {
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reg = <0x80400000 DT_SIZE_M(1)>;
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};
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lpuart7: serial@42690000 {
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compatible = "nxp,imx-lpuart", "nxp,lpuart";
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reg = <0x42690000 DT_SIZE_K(64)>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-names = "irq_0";
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interrupt-parent = <&gic>;
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clocks = <&ccm IMX_CCM_LPUART7_CLK 0x6c 24>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart7_default>;
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pinctrl-names = "default";
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};
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aliases {
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led0 = &blinky0;
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sw0 = &button0;
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};
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leds {
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compatible = "gpio-leds";
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blinky0: blinky_0 {
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gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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button0: btn_0 {
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label = "BTN0";
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gpios = <&gpio2 27 (GPIO_PULL_UP|GPIO_ACTIVE_LOW)>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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};
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&gpio2 {
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status = "okay";
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};
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&gpio4 {
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status = "okay";
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};

‎boards/variscite/imx93_var_dart/imx93_var_dart_mimx9352_a55.yaml

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#
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# Copyright 2025 Variscite Ltd.
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# Copyright 2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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identifier: imx93_var_dart/mimx9352/a55
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name: Variscite DART-MX93 A55
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 1024
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supported:
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- gpio
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- uart
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testing:
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ignore_tags:
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- bluetooth

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