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boards: nxp_rw612: Add support for u-blox EVK-IRIS-W1x
Add basic board definition of the u-blox EVK-IRIS-W1-rw612 board. Adds maintainer info for u-blox boards. Signed-off-by: Tarang Patel <tarang3399.patel@gmail.com>
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MAINTAINERS.yml

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tests:
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- tracing
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u-blox Platforms:
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status: maintained
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maintainers:
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- 3rang
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files:
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- boards/u-blox/
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labels:
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- "platform: u-blox"
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USB:
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status: maintained
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maintainers:
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#
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#Copyright 2022-2025 NXP
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#Copyright(c)2025 u-blox AG
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#SPDX-License-Identifier:Apache-2.0
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#
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if(CONFIG_NXP_RW6XX_BOOT_HEADER)
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zephyr_compile_definitions(BOARD_FLASH_SIZE=${CONFIG_FLASH_SIZE}*1024)
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if(BOARD_REVISION STREQUAL "macronix")
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zephyr_library_sources(macronix_flash_config.c)
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elseif(BOARD_REVISION STREQUAL "fidelex")
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zephyr_library_sources(fidelex_flash_config.c)
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else()
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message(FATAL_ERROR "Unsupported board revision: ${BOARD_REVISION}")
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endif()
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if(CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND CONFIG_XTAL32K)
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message(FATAL_ERROR
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"Ethernet and external 32K clock source are "
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"mutually exclusive on FRDM_RW612 due to shared PCB nets "
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"between the ethernet PHY and the external oscillator")
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endif()
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endif()
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# SPDX-License-Identifier: Apache-2.0
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# Copyright 2022-2025 NXP
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# Copyright (c) 2025 u-blox AG
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#
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if BOARD_UBX_EVK_IRIS_W1
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if COUNTER_MCUX_LPC_RTC_1HZ
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config XTAL32K
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default y
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endif # COUNTER_MCUX_LPC_RTC_1HZ
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endif # BOARD_UBX_EVK_IRIS_W1
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# EVK-IRIS-W1 board configuration
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# Copyright (c) 2025 u-blox AG
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_UBX_EVK_IRIS_W1
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select SOC_PART_NUMBER_RW612ETA2I
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# Copyright 2022-2023 NXP
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=RW612" "--reset-after-load")
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board_runner_args(linkserver "--device=RW612:RDRW612")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
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board:
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name: ubx_evk_iris_w1
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full_name: EVK-IRIS-W106-RW612
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vendor: u-blox
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revision:
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format: custom
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default: fidelex
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revisions:
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- name: "macronix"
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- name: "fidelex"
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socs:
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- name: rw612
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.. zephyr:board:: ubx_evk_iris_w1
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Overview
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********
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The EVK-IRIS-W10x evaluation kit enables stand-alone use of the IRIS-W10 series module. This guide
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provides details about the hardware functionality of the EVK-IRIS-W10 board and includes setup
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instructions for starting development.
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All pins and interfaces supported on IRIS-W10 series modules are easily accessible from the
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evaluation board. Simple USB connections serve as the physical interfaces for power, programming
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COM ports, debugging, and USB peripheral connectors. Additionally, the board features other
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interfaces like Ethernet RJ45 and an SDIO header. The EVK-IRIS-W10 board is equipped with a Reset
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button, Boot button, and two user-configurable buttons. Current sense resistors are incorporated for
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accurate current measurement within the module.
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For flexible use, GPIO signals are accessible through headers and are complemented by four
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mikroBUS™ standard slots for convenient utilization of Click boards™. Each Click board can be
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seamlessly plugged into an available mikroBUS™ slot to facilitate effortless hardware expansion with
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a variety of standardized compact add-on boards. Click boards are designed to accommodate a
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diverse range of electronic modules, including sensors, transceivers, displays, encoders, motor
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drivers, connection ports, and more. For further information about the Click boards, visit the MIKROE
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website.
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Hardware
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********
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- 260 MHz ARM Cortex-M33, tri-radio cores for Wi-Fi 6 + BLE 5.3 + 802.15.4
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- 1.2 MB on-chip SRAM
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- EVK-IRIS-W101 evaluation board with IRIS-W101 module. Dual-band PCB antenna for WLAN
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with 100 mm coaxial cable and U.FL connector
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- EVK-IRIS-W106 evaluation board with IRIS-W106 module. Dual-band integrated PCB trace
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antenna (external antenna not supplied)
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Flash Memory Configuration
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==========================
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The IRIS-W1 board uses different flash vendors depending on revision:
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- ``@macronix``: Module build up to 2023 week 45
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- ``@fidelex``: Module build 2023 week 46 (2346) onward
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To build for a specific flash version:
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.. code-block:: bash
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west build -b ubx_evk_iris_w1@macronix
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west build -b ubx_evk_iris_w1@fidelex
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Basic functionality like UART (default on FC3), GPIOs (I²C, SPI), and the on-board RGB LEDs is supported.
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Programming and Debugging
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*************************
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.. zephyr:board-supported-runners::
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Configuring a Debug Probe
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=========================
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A debug probe is used for both flashing and debugging the board. This board is
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configured by default to use the J-Link firmware.
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Configuring a Console
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=====================
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Connect a USB cable from your PC to USB3, and use the serial terminal of your choice
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(minicom, PuTTY, etc.) with the following settings:
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Flashing
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========
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Here is an example for the ``hello_world`` application.
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Open a serial terminal, reset the board (press the RESET button), and you should
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see the following message in the terminal:
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.. code-block:: console
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**** Booting Zephyr OS build v4.1.0-2794-g6463c68bc394 ****
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Hello World ! ubx_evk_iris_w1/rw612
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Wireless Connectivity Support
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*****************************
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Fetch Binary Blobs
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==================
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To support Bluetooth or Wi-Fi, ``ubx_evk_iris_w1`` requires fetching binary blobs. This can be
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achieved by running the following command:
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.. code-block:: console
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west blobs fetch hal_nxp
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Bluetooth
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=========
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BLE functionality requires fetching binary blobs, so make sure to follow
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the "Fetch Binary Blobs" section first.
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The required binary blob
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``<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x_sb_ble_a2.bin`` will be linked
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with the application image directly, forming a single monolithic image.
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Wi-Fi
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=====
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Wi-Fi functionality also requires fetching binary blobs, so make sure to follow
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the "Fetch Binary Blobs" section first.
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The required binary blob
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``<zephyr workspace>/modules/hal/nxp/zephyr/blobs/rw61x_sb_wifi_a2.bin`` will be linked
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with the application image directly, forming a single monolithic image.
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Resources
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*********
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- `EVK-IRIS-W1 Website <https://www.u-blox.com/en/product/evk-iris-w1>`_
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- `EVK-IRIS-W1 GitHub <https://github.com/u-blox/u-blox-sho-OpenCPU/tree/master/MCUXpresso/IRIS-W1>`_
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- `EVK-IRIS-W1 User Guide <https://content.u-blox.com/sites/default/files/documents/EVK-IRIS-W1_UserGuide_UBX-23007837.pdf>`_
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/*
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* Copyright (c) 2021-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <flash_config.h>
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__attribute__((section(".flash_conf"), used))
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const fc_flexspi_nor_config_t flexspi_config = {
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.memConfig = {
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.tag = FC_BLOCK_TAG,
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.version = FC_BLOCK_VERSION,
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.readSampleClkSrc = 1,
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.csHoldTime = 3,
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.csSetupTime = 3,
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.deviceModeCfgEnable = 1,
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.deviceModeSeq = { .seqNum = 1, .seqId = 2 },
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.deviceModeArg = 0x0200,
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.configCmdEnable = 0,
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.deviceType = 0x1,
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.sflashPadType = kSerialFlash_4Pads,
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.serialClkFreq = 7,
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.sflashA1Size = 0x1000000U,
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.sflashA2Size = 0,
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.sflashB1Size = 0,
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.sflashB2Size = 0,
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.lookupTable = {
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/* Read */
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[0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0xEB,
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FC_RADDR_SDR, FC_FLEXSPI_4PAD, 0x18),
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[1] = FC_FLEXSPI_LUT_SEQ(
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FC_MODE8_SDR, FC_FLEXSPI_4PAD, 0x00,
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FC_DUMMY_SDR, FC_FLEXSPI_4PAD, 0x04),
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[2] = FC_FLEXSPI_LUT_SEQ(
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FC_READ_SDR, FC_FLEXSPI_4PAD, 0x04,
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FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
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/* Read Status */
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[4 * 1 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x05,
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FC_READ_SDR, FC_FLEXSPI_1PAD, 0x04),
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/* Write Status */
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[4 * 2 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x01,
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FC_WRITE_SDR, FC_FLEXSPI_1PAD, 0x02),
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/* Write Enable */
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[4 * 3 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x06,
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FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
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/* Sector erase */
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[4 * 5 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x20,
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FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x18),
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/* Block erase */
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[4 * 8 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x52,
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FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x18),
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/* Page program */
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[4 * 9 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x02,
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FC_RADDR_SDR, FC_FLEXSPI_1PAD, 0x18),
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[4 * 9 + 1] = FC_FLEXSPI_LUT_SEQ(
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FC_WRITE_SDR, FC_FLEXSPI_1PAD, 0x00,
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FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
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/* Chip erase */
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[4 * 11 + 0] = FC_FLEXSPI_LUT_SEQ(
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FC_CMD_SDR, FC_FLEXSPI_1PAD, 0x60,
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FC_STOP_EXE, FC_FLEXSPI_1PAD, 0x00),
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},
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},
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.pageSize = 0x100,
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.sectorSize = 0x1000,
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.ipcmdSerialClkFreq = 0,
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.blockSize = 0x8000,
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.fcb_fill[0] = 0xFFFFFFFFU,
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};

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