Skip to content

Commit d260e21

Browse files
committed
soc: silabs: Add support for Silabs EFR32ZG28 SoC
Add support for Silicon Labs EFR32ZG28 SoC. Signed-off-by: Shontal Biton <shontal1005@gmail.com>
1 parent b15404f commit d260e21

File tree

13 files changed

+5454
-1
lines changed

13 files changed

+5454
-1
lines changed

dts/arm/silabs/xg28/efr32xg28.dtsi

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,37 @@
1+
/*
2+
* Copyright (c) 2025 Silicon Laboratories Inc.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <silabs/xg28/xg28.dtsi>
8+
9+
/ {
10+
soc {
11+
radio: radio@b0000000 {
12+
compatible = "silabs,series2-radio";
13+
reg = <0xb0000000 0x1000000>;
14+
interrupts = <31 1>, <32 1>, <33 1>, <34 1>, <35 1>, <36 1>,
15+
<37 1>, <38 1>, <39 1>, <40 1>, <74 1>, <75 1>;
16+
interrupt-names = "agc", "bufc", "frc_pri", "frc", "modem", "protimer",
17+
"rac_rsm", "rac_seq", "hostmailbox", "synth",
18+
"rfeca0", "rfeca1";
19+
pa-initial-power-dbm = <10>;
20+
pa-ramp-time-us = <10>;
21+
pa-voltage-mv = <3300>;
22+
pa-subghz = "highest";
23+
24+
bt_hci_silabs: bt_hci_silabs {
25+
compatible = "silabs,bt-hci-efr32";
26+
status = "disabled";
27+
};
28+
29+
pti: pti {
30+
compatible = "silabs,pti";
31+
clock-frequency = <DT_FREQ_K(1600)>;
32+
mode = "uart";
33+
status = "disabled";
34+
};
35+
};
36+
};
37+
};

dts/arm/silabs/xg28/efr32zg28.dtsi

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
/*
2+
* Copyright (c) 2025 Silicon Laboratories Inc.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <silabs/xg28/efr32xg28.dtsi>
Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
/*
2+
* Copyright (c) 2025 Shontal Biton
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <mem.h>
8+
#include <silabs/xg28/efr32zg28.dtsi>
9+
10+
/ {
11+
sram0: memory@20000000 {
12+
reg = <0x20000000 DT_SIZE_K(256)>;
13+
};
14+
15+
soc {
16+
compatible = "silabs,efr32zg28b322f1024im68",
17+
"silabs,efr32zg28", "silabs,efr32",
18+
"simple-bus";
19+
};
20+
};
21+
22+
&flash0 {
23+
reg = <0x08000000 DT_SIZE_K(1024)>;
24+
};

0 commit comments

Comments
 (0)