Skip to content

Commit d1c53b0

Browse files
shontal1005shontal1005
committed
Add support for SiLabs EFR32ZG28 SoC
1 parent d5201e1 commit d1c53b0

File tree

25 files changed

+5791
-9
lines changed

25 files changed

+5791
-9
lines changed

‎boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a.dts

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -246,14 +246,8 @@
246246
reg = <0x00040000 DT_SIZE_K(208)>;
247247
};
248248

249-
/* Reserve 32 kB for the scratch partition */
250-
scratch_partition: partition@74000 {
251-
label = "image-scratch";
252-
reg = <0x00074000 DT_SIZE_K(32)>;
253-
};
254-
255249
/* Set 16 kB of storage at the end of the 1536 kB of flash */
256-
storage_partition: partition@7c000 {
250+
storage_partition: partition@74000 {
257251
label = "storage";
258252
reg = <0x0007c000 DT_SIZE_K(16)>;
259253
};

‎boards/silabs/radio_boards/xg28_rb4401c/Kconfig.defconfig

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
# Copyright (c) 2025 Shontal Biton
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if BOARD_XG28_RB4401C
5+
6+
config LOG_BACKEND_SWO_FREQ_HZ
7+
default 875000
8+
depends on LOG_BACKEND_SWO
9+
10+
if SOC_GECKO_USE_RAIL
11+
12+
config FPU
13+
default y
14+
15+
endif # SOC_GECKO_USE_RAIL
16+
17+
endif # BOARD_XG28_RB4401C

‎boards/silabs/radio_boards/xg28_rb4401c/Kconfig.xg28_rb4401c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2025 Shontal Biton
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config BOARD_XG28_RB4401C
5+
select SOC_PART_NUMBER_EFR32ZG28B322F1024IM68

‎boards/silabs/radio_boards/xg28_rb4401c/board.cmake

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
3+
board_runner_args(jlink "--device=EFR32ZG28BxxxF1024")
4+
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
5+
6+
board_runner_args(openocd)
7+
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
8+
9+
board_runner_args(silabs_commander "--device=EFR32ZG28B322F1024IM68")
10+
include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake)

‎boards/silabs/radio_boards/xg28_rb4401c/board.yml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: xg28_rb4401c
3+
full_name: EFR32xG28 868-915 MHz 20 dBm (xG28-RB4401C)
4+
vendor: silabs
5+
socs:
6+
- name: efr32zg28b322f1024im68

‎boards/silabs/radio_boards/xg28_rb4401c/doc/efr32zg28-xg28-rb4401c.jpg

10.3 KB
Loading

‎boards/silabs/radio_boards/xg28_rb4401c/doc/index.rst

Lines changed: 138 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,138 @@
1+
.. zephyr:board:: xg28_rb4401c
2+
3+
Overview
4+
********
5+
6+
The EFR32ZG28 Radio Board is the radio board delivered with
7+
`_xG28-PK6024A Website`_. It contains a Wireless System-On-Chip from the
8+
EFR32ZG28 family built on an ARM Cortex®-M33 processor with excellent low
9+
power capabilities.
10+
11+
The BRD4401C a.k.a. xG28-RB4401C radio board plugs into the Wireless Pro Kit
12+
Mainboard BRD4401C and is supported as one of :ref:`silabs_radio_boards`.
13+
14+
Hardware
15+
********
16+
17+
- EFR32ZG28B322F1024IM68 SoC
18+
- CPU core: ARM Cortex®-M33 with FPU
19+
- Flash memory: 1024 kB
20+
- RAM: 256 kB
21+
- Transmit power: up to +20 dBm
22+
- Operation frequency: 868-915 MHz
23+
- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz).
24+
- Silicon Labs Si7021 relative humidity and temperature sensor
25+
- Low-power 128x128 pixel Memory LCD
26+
- Macronix ultra low power 8-Mbit SPI flash (MX25R8035F)
27+
28+
For more information about the EFR32ZG28 SoC and BRD4401C board, refer to these
29+
documents:
30+
31+
- `EFR32ZG28 Website`_
32+
- `EFR32ZG28 Datasheet`_
33+
- `EFR32xG28 Reference Manual`_
34+
- `XG28-PK6024A Website`_
35+
- `BRD4401C User Guide`_
36+
37+
Supported Features
38+
==================
39+
40+
.. zephyr:board-supported-hw::
41+
42+
Connections and IOs
43+
===================
44+
45+
In the following table, the column **Name** contains Pin names. For example, PA2
46+
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
47+
48+
+-------+-------------+-------------------------------------+
49+
| Name | Function | Usage |
50+
+=======+=============+=====================================+
51+
| PD11 | UART_TX | UART Console TX |
52+
+-------+-------------+-------------------------------------+
53+
| PD12 | UART_RX | UART Console RX |
54+
+-------+-------------+-------------------------------------+
55+
| PB1 | GPIO | Push Button 0 |
56+
+-------+-------------+-------------------------------------+
57+
| PB2 | GPIO | LED0 |
58+
+-------+-------------+-------------------------------------+
59+
| PB3 | GPIO | Push Button 1 |
60+
+-------+-------------+-------------------------------------+
61+
| PD3 | GPIO | LED1 |
62+
+-------+-------------+-------------------------------------+
63+
| PD10 | SPI_CS | SPI chip select |
64+
+-------+-------------+-------------------------------------+
65+
| PD9 | SPI_CLK | SPI clock |
66+
+-------+-------------+-------------------------------------+
67+
| PD8 | SPI_MISO | SPI slave to master |
68+
+-------+-------------+-------------------------------------+
69+
| PD7 | SPI_MOSI | SPI master to slave |
70+
+-------+-------------+-------------------------------------+
71+
| PC5 | I2C0_SCL | I2C Clock |
72+
+-------+-------------+-------------------------------------+
73+
| PC7 | I2C0_SDA | I2C Data |
74+
+-------+-------------+-------------------------------------+
75+
| PC11 | GPIO | Display/Si7021 Enable |
76+
+-------+-------------+-------------------------------------+
77+
78+
The default configuration can be found in
79+
:zephyr_file:`boards/silabs/radio_boards/xg28_rb4401c/xg28_rb4401c_defconfig`
80+
81+
System Clock
82+
============
83+
84+
The EFR32ZG28 SoC is configured to use the 39 MHz external oscillator on the
85+
board.
86+
87+
Serial Port
88+
===========
89+
90+
The EFR32ZG28 SoC has one USART and three EUSARTs.
91+
USART0 is connected to the board controller and is used for the console.
92+
93+
Programming and Debugging
94+
*************************
95+
96+
.. zephyr:board-supported-runners::
97+
98+
Flashing
99+
========
100+
101+
Connect the BRD4401C board with a mounted BRD4401C radio module to your host
102+
computer using the USB port.
103+
104+
Here is an example for the :zephyr:code-sample:`hello_world` application.
105+
106+
.. zephyr-app-commands::
107+
:zephyr-app: samples/hello_world
108+
:board: xg28_rb4401c
109+
:goals: flash
110+
111+
Open a serial terminal (minicom, putty, etc.) with the following settings:
112+
113+
- Speed: 115200
114+
- Data: 8 bits
115+
- Parity: None
116+
- Stop bits: 1
117+
118+
Reset the board and you should see the following message in the terminal:
119+
120+
.. code-block:: console
121+
122+
Hello World! xg28_rb4401c/efr32zg28b322f1024im68
123+
124+
125+
.. _xG28-PK6024A Website:
126+
https://www.silabs.com/development-tools/wireless/efr32xg28-pro-kit-14-dbm
127+
128+
.. _BRD4401C User Guide:
129+
https://www.silabs.com/documents/public/user-guides/ug535-xg28-20dbm-user-guide.pdf
130+
131+
.. _EFR32ZG28 Website:
132+
https://www.silabs.com/wireless/z-wave/efr32zg28-z-wave-800-socs
133+
134+
.. _EFR32ZG28 Datasheet:
135+
https://www.silabs.com/documents/public/data-sheets/efr32zg28-datasheet.pdf
136+
137+
.. _EFR32xG28 Reference Manual:
138+
https://www.silabs.com/documents/public/reference-manuals/efr32xg28-rm.pdf

‎boards/silabs/radio_boards/xg28_rb4401c/pre_dt_board.cmake

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2021 Linaro Limited
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
# SPI is implemented via usart so node name isn't spi@...
5+
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

‎boards/silabs/radio_boards/xg28_rb4401c/support/openocd.cfg

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
if {[info exists env(OPENOCD_INTERFACE)]} {
2+
set INTERFACE $env(OPENOCD_INTERFACE)
3+
} else {
4+
# By default connect over Debug USB port using the J-Link interface
5+
set INTERFACE "jlink"
6+
}
7+
8+
source [find interface/$INTERFACE.cfg]
9+
10+
transport select swd
11+
12+
set CHIPNAME efr32
13+
14+
source [find target/efm32.cfg]
15+
16+
$_TARGETNAME configure -event gdb-attach {
17+
echo "Debugger attaching: halting execution"
18+
reset halt
19+
gdb_breakpoint_override hard
20+
}
21+
22+
$_TARGETNAME configure -event gdb-detach {
23+
echo "Debugger detaching: resuming execution"
24+
resume
25+
}

‎boards/silabs/radio_boards/xg28_rb4401c/xg28_rb4401c-pinctrl.dtsi

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
/*
2+
* Copyright (c) 2025 Shontal Biton
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include <dt-bindings/pinctrl/silabs/xg28-pinctrl.h>
8+
9+
&pinctrl {
10+
usart0_default: usart0_default {
11+
group0 {
12+
pins = <USART0_TX_PD11>;
13+
drive-push-pull;
14+
output-high;
15+
};
16+
17+
group1 {
18+
pins = <USART0_RX_PD12>;
19+
input-enable;
20+
silabs,input-filter;
21+
};
22+
};
23+
};

0 commit comments

Comments
 (0)