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RichardSWheatleyAlessandroLuo
RichardSWheatley
authored and
AlessandroLuo
committed
dts: bindings: move clk-source to parent
Move clk-source from pwm to timer change associated files to match Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
1 parent dd57412 commit d090980

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15 files changed

+188
-166
lines changed

15 files changed

+188
-166
lines changed

‎boards/ambiq/apollo3_evb/apollo3_evb.dts

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -178,7 +178,6 @@
178178
&timer2 {
179179
pwm2: pwm {
180180
timer-segment = "SEGMENT_B";
181-
clock-select = "CLK_SELECT_HFRC_187_5KHZ";
182181
pwm-type = "PWM_REPEAT";
183182
pinctrl-0 = <&pwm2_default>;
184183
pinctrl-names = "default";

‎boards/ambiq/apollo3p_evb/apollo3p_evb.dts

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -156,7 +156,6 @@
156156
&timer2 {
157157
pwm2: pwm {
158158
timer-segment = "SEGMENT_B";
159-
clock-select = "CLK_SELECT_HFRC_187_5KHZ";
160159
pwm-type = "PWM_REPEAT";
161160
pinctrl-0 = <&pwm2_default>;
162161
pinctrl-names = "default";

‎boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,6 @@
9393

9494
&timer2 {
9595
pwm2: pwm {
96-
clock-select = "CLK_SELECT_HFRC_DIV64";
9796
pinctrl-0 = <&pwm2_default>;
9897
pinctrl-names = "default";
9998
status = "disabled";

‎boards/ambiq/apollo4p_evb/apollo4p_evb.dts

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,6 @@
9797

9898
&timer2 {
9999
pwm2: pwm {
100-
clock-select = "CLK_SELECT_HFRC_DIV64";
101100
pinctrl-0 = <&pwm2_default>;
102101
pinctrl-names = "default";
103102
status = "disabled";

‎drivers/counter/counter_ambiq_timer.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -443,7 +443,7 @@ static void counter_ambiq_isr(void *arg)
443443
static const struct counter_ambiq_config counter_config_##idx = { \
444444
.instance = (DT_REG_ADDR(DT_INST_PARENT(idx)) - SOC_TIMER_BASE) / \
445445
DT_REG_SIZE(DT_INST_PARENT(idx)), \
446-
.clk_src = DT_PROP(DT_INST_PARENT(idx), clk_source), \
446+
.clk_src = DT_ENUM_IDX(DT_INST_PARENT(idx), clk_source), \
447447
.counter_info = {.max_top_value = UINT32_MAX, \
448448
.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
449449
.channels = 1}, \

‎drivers/pwm/pwm_ambiq_ctimer.c

Lines changed: 22 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -16,11 +16,11 @@
1616

1717
LOG_MODULE_REGISTER(ambiq_ctimer_pwm, CONFIG_PWM_LOG_LEVEL);
1818

19-
struct pwm_ambiq_timer_data {
19+
struct pwm_ambiq_ctimer_data {
2020
uint32_t cycles;
2121
};
2222

23-
struct pwm_ambiq_timer_config {
23+
struct pwm_ambiq_ctimer_config {
2424
uint32_t timer_num;
2525
uint32_t timer_seg;
2626
uint32_t pwm_type;
@@ -126,11 +126,11 @@ static void start_clock(uint32_t clock_sel)
126126
}
127127
}
128128

129-
static int ambiq_timer_pwm_set_cycles(const struct device *dev, uint32_t channel,
129+
static int ambiq_ctimer_pwm_set_cycles(const struct device *dev, uint32_t channel,
130130
uint32_t period_cycles, uint32_t pulse_cycles,
131131
pwm_flags_t flags)
132132
{
133-
const struct pwm_ambiq_timer_config *config = dev->config;
133+
const struct pwm_ambiq_ctimer_config *config = dev->config;
134134

135135
if (period_cycles == 0) {
136136
LOG_ERR("period_cycles can not be set to zero");
@@ -171,10 +171,10 @@ static int ambiq_timer_pwm_set_cycles(const struct device *dev, uint32_t channel
171171
return 0;
172172
}
173173

174-
static int ambiq_timer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t channel,
174+
static int ambiq_ctimer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t channel,
175175
uint64_t *cycles)
176176
{
177-
struct pwm_ambiq_timer_data *data = dev->data;
177+
struct pwm_ambiq_ctimer_data *data = dev->data;
178178
int err = 0;
179179

180180
/* clean up upper word of return parameter */
@@ -186,10 +186,10 @@ static int ambiq_timer_pwm_get_cycles_per_sec(const struct device *dev, uint32_t
186186
return err;
187187
}
188188

189-
static int ambiq_timer_pwm_init(const struct device *dev)
189+
static int ambiq_ctimer_pwm_init(const struct device *dev)
190190
{
191-
const struct pwm_ambiq_timer_config *config = dev->config;
192-
struct pwm_ambiq_timer_data *data = dev->data;
191+
const struct pwm_ambiq_ctimer_config *config = dev->config;
192+
struct pwm_ambiq_ctimer_data *data = dev->data;
193193
int err;
194194

195195
err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);
@@ -223,26 +223,28 @@ static int ambiq_timer_pwm_init(const struct device *dev)
223223
return 0;
224224
}
225225

226-
static DEVICE_API(pwm, pwm_ambiq_timer_driver_api) = {
227-
.set_cycles = ambiq_timer_pwm_set_cycles,
228-
.get_cycles_per_sec = ambiq_timer_pwm_get_cycles_per_sec,
226+
static DEVICE_API(pwm, pwm_ambiq_ctimer_driver_api) = {
227+
.set_cycles = ambiq_ctimer_pwm_set_cycles,
228+
.get_cycles_per_sec = ambiq_ctimer_pwm_get_cycles_per_sec,
229229
};
230230

231-
#define PWM_AMBIQ_TIMER_DEVICE_INIT(n) \
231+
#define TEST_CHILDREN DT_PATH(test, test_children)
232+
233+
#define PWM_AMBIQ_CTIMER_DEVICE_INIT(n) \
232234
PINCTRL_DT_INST_DEFINE(n); \
233-
static struct pwm_ambiq_timer_data pwm_ambiq_timer_data_##n = { \
235+
static struct pwm_ambiq_ctimer_data pwm_ambiq_ctimer_data_##n = { \
234236
.cycles = 0, \
235237
}; \
236-
static const struct pwm_ambiq_timer_config pwm_ambiq_timer_config_##n = { \
238+
static const struct pwm_ambiq_ctimer_config pwm_ambiq_ctimer_config_##n = { \
237239
.timer_num = (DT_REG_ADDR(DT_INST_PARENT(n)) - CTIMER_BASE) / \
238240
DT_REG_SIZE(DT_INST_PARENT(n)), \
239241
.timer_seg = DT_INST_ENUM_IDX(n, timer_segment), \
240-
.clock_sel = DT_INST_ENUM_IDX(n, clock_select), \
242+
.clock_sel = DT_ENUM_IDX(DT_INST_PARENT(n), clk_source), \
241243
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
242244
.pwm_type = DT_INST_ENUM_IDX(n, pwm_type)}; \
243245
\
244-
DEVICE_DT_INST_DEFINE(n, ambiq_timer_pwm_init, NULL, &pwm_ambiq_timer_data_##n, \
245-
&pwm_ambiq_timer_config_##n, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \
246-
&pwm_ambiq_timer_driver_api);
246+
DEVICE_DT_INST_DEFINE(n, ambiq_ctimer_pwm_init, NULL, &pwm_ambiq_ctimer_data_##n, \
247+
&pwm_ambiq_ctimer_config_##n, POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \
248+
&pwm_ambiq_ctimer_driver_api);
247249

248-
DT_INST_FOREACH_STATUS_OKAY(PWM_AMBIQ_TIMER_DEVICE_INIT)
250+
DT_INST_FOREACH_STATUS_OKAY(PWM_AMBIQ_CTIMER_DEVICE_INIT)

‎drivers/pwm/pwm_ambiq_timer.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -189,7 +189,7 @@ static DEVICE_API(pwm, pwm_ambiq_timer_driver_api) = {
189189
static const struct pwm_ambiq_timer_config pwm_ambiq_timer_config_##n = { \
190190
.timer_num = (DT_REG_ADDR(DT_INST_PARENT(n)) - TIMER_BASE) / \
191191
DT_REG_SIZE(DT_INST_PARENT(n)), \
192-
.clock_sel = DT_INST_ENUM_IDX(n, clock_select), \
192+
.clock_sel = DT_ENUM_IDX(DT_INST_PARENT(n), clk_source), \
193193
.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n)}; \
194194
\
195195
DEVICE_DT_INST_DEFINE(n, ambiq_timer_pwm_init, NULL, &pwm_ambiq_timer_data_##n, \

‎dts/arm/ambiq/ambiq_apollo3_blue.dtsi

Lines changed: 24 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,7 @@
102102
compatible = "ambiq,ctimer";
103103
reg = <0x40008000 0x20>;
104104
interrupts = <14 0>;
105-
clk-source = <2>;
105+
clk-source = "CLK_SELECT_HFRC_3MHZ";
106106
status = "disabled";
107107
counter {
108108
compatible = "ambiq,counter";
@@ -119,7 +119,7 @@
119119
compatible = "ambiq,ctimer";
120120
reg = <0x40008020 0x20>;
121121
interrupts = <14 0>;
122-
clk-source = <2>;
122+
clk-source = "CLK_SELECT_HFRC_3MHZ";
123123
status = "disabled";
124124
counter {
125125
compatible = "ambiq,counter";
@@ -136,7 +136,24 @@
136136
compatible = "ambiq,ctimer";
137137
reg = <0x40008040 0x20>;
138138
interrupts = <14 0>;
139-
clk-source = <2>;
139+
clk-source = "CLK_SELECT_HFRC_187_5KHZ";
140+
status = "disabled";
141+
counter {
142+
compatible = "ambiq,counter";
143+
status = "disabled";
144+
};
145+
pwm {
146+
compatible = "ambiq,ctimer-pwm";
147+
status = "disabled";
148+
#pwm-cells = <3>;
149+
};
150+
};
151+
152+
timer3: timer@40008060 {
153+
compatible = "ambiq,ctimer";
154+
reg = <0x40008060 0x20>;
155+
interrupts = <14 0>;
156+
clk-source = "CLK_SELECT_HFRC_3MHZ";
140157
status = "disabled";
141158
counter {
142159
compatible = "ambiq,counter";
@@ -153,7 +170,7 @@
153170
compatible = "ambiq,ctimer";
154171
reg = <0x40008080 0x20>;
155172
interrupts = <14 0>;
156-
clk-source = <2>;
173+
clk-source = "CLK_SELECT_HFRC_3MHZ";
157174
status = "disabled";
158175
counter {
159176
compatible = "ambiq,counter";
@@ -170,7 +187,7 @@
170187
compatible = "ambiq,ctimer";
171188
reg = <0x400080A0 0x20>;
172189
interrupts = <14 0>;
173-
clk-source = <2>;
190+
clk-source = "CLK_SELECT_HFRC_3MHZ";
174191
status = "disabled";
175192
counter {
176193
compatible = "ambiq,counter";
@@ -187,7 +204,7 @@
187204
compatible = "ambiq,ctimer";
188205
reg = <0x400080C0 0x20>;
189206
interrupts = <14 0>;
190-
clk-source = <2>;
207+
clk-source = "CLK_SELECT_HFRC_3MHZ";
191208
status = "disabled";
192209
counter {
193210
compatible = "ambiq,counter";
@@ -204,7 +221,7 @@
204221
compatible = "ambiq,ctimer";
205222
reg = <0x400080E0 0x20>;
206223
interrupts = <14 0>;
207-
clk-source = <2>;
224+
clk-source = "CLK_SELECT_HFRC_3MHZ";
208225
status = "disabled";
209226
counter {
210227
compatible = "ambiq,counter";

‎dts/arm/ambiq/ambiq_apollo3p_blue.dtsi

Lines changed: 24 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,7 @@
120120
compatible = "ambiq,ctimer";
121121
reg = <0x40008000 0x20>;
122122
interrupts = <14 0>;
123-
clk-source = <2>;
123+
clk-source = "CLK_SELECT_HFRC_3MHZ";
124124
status = "disabled";
125125
counter {
126126
compatible = "ambiq,counter";
@@ -137,7 +137,7 @@
137137
compatible = "ambiq,ctimer";
138138
reg = <0x40008020 0x20>;
139139
interrupts = <14 0>;
140-
clk-source = <2>;
140+
clk-source = "CLK_SELECT_HFRC_3MHZ";
141141
status = "disabled";
142142
counter {
143143
compatible = "ambiq,counter";
@@ -154,7 +154,24 @@
154154
compatible = "ambiq,ctimer";
155155
reg = <0x40008040 0x20>;
156156
interrupts = <14 0>;
157-
clk-source = <2>;
157+
clk-source = "CLK_SELECT_HFRC_187_5KHZ";
158+
status = "disabled";
159+
counter {
160+
compatible = "ambiq,counter";
161+
status = "disabled";
162+
};
163+
pwm {
164+
compatible = "ambiq,ctimer-pwm";
165+
status = "disabled";
166+
#pwm-cells = <3>;
167+
};
168+
};
169+
170+
timer3: timer@40008060 {
171+
compatible = "ambiq,ctimer";
172+
reg = <0x40008060 0x20>;
173+
interrupts = <14 0>;
174+
clk-source = "CLK_SELECT_HFRC_3MHZ";
158175
status = "disabled";
159176
counter {
160177
compatible = "ambiq,counter";
@@ -171,7 +188,7 @@
171188
compatible = "ambiq,ctimer";
172189
reg = <0x40008080 0x20>;
173190
interrupts = <14 0>;
174-
clk-source = <2>;
191+
clk-source = "CLK_SELECT_HFRC_3MHZ";
175192
status = "disabled";
176193
counter {
177194
compatible = "ambiq,counter";
@@ -188,7 +205,7 @@
188205
compatible = "ambiq,ctimer";
189206
reg = <0x400080A0 0x20>;
190207
interrupts = <14 0>;
191-
clk-source = <2>;
208+
clk-source = "CLK_SELECT_HFRC_3MHZ";
192209
status = "disabled";
193210
counter {
194211
compatible = "ambiq,counter";
@@ -205,7 +222,7 @@
205222
compatible = "ambiq,ctimer";
206223
reg = <0x400080C0 0x20>;
207224
interrupts = <14 0>;
208-
clk-source = <2>;
225+
clk-source = "CLK_SELECT_HFRC_3MHZ";
209226
status = "disabled";
210227
counter {
211228
compatible = "ambiq,counter";
@@ -222,7 +239,7 @@
222239
compatible = "ambiq,ctimer";
223240
reg = <0x400080E0 0x20>;
224241
interrupts = <14 0>;
225-
clk-source = <2>;
242+
clk-source = "CLK_SELECT_HFRC_3MHZ";
226243
status = "disabled";
227244
counter {
228245
compatible = "ambiq,counter";

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