boards: silabs: siwx91x: Add support for QSPI controller

Thanks to the bootloader, the memory controller is preconfigured when
Zephyr start on RB44342A.

However, this is the opportunity to show how to configure the PSRAM
controller on custom designs.

Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>

Author: jerome-pouiller

boards/silabs/radio_boards/siwx917_rb4342a/siwx917_rb4342a.dts

@@ -31,13 +31,6 @@
 		dht0 = &si7021;
 	};
 
-	psram: psram@a000000 {
-		compatible = "zephyr,memory-region", "mmio-sram";
-		reg = <0xa000000 DT_SIZE_M(8)>;
-		zephyr,memory-region = "psram";
-		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
-	};
-
 	leds {
 		compatible = "gpio-leds";
 
@@ -57,6 +50,17 @@
 };
 
 &pinctrl0 {
+	psram_default: psram_default {
+		group {
+			pinmux = <PSRAM_CLK_HP52>,
+				 <PSRAM_D0_HP53>,
+				 <PSRAM_D1_HP54>,
+				 <PSRAM_D2_HP56>,
+				 <PSRAM_D3_HP57>,
+				 <PSRAM_CSN0_HP55>;
+		};
+	};
+
 	ulpuart_default: ulpuart_default {
 		out {
 			pinmux = <ULPUART_TX_ULP11>;
@@ -109,6 +113,23 @@
 	};
 };
 
+&psramctrl0 {
+	status = "okay";
+	clocks = <&clock0 SIWX91X_CLK_QSPI>;
+	pinctrl-0 = <&psram_default>;
+	pinctrl-names = "default";
+	device-id = [ 0d 5d 00 00 00 00 00 00 ];
+	normal-freq = <DT_FREQ_M(33)>;
+	fast-freq = <DT_FREQ_M(144)>;
+
+	psram: psram@a000000 {
+		compatible = "zephyr,memory-region", "mmio-sram";
+		reg = <0xa000000 DT_SIZE_M(8)>;
+		zephyr,memory-region = "psram";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
+	};
+};
+
 &bt_hci0 {
 	status = "okay";
 };

boards/silabs/radio_boards/siwx917_rb4342a/siwx917_rb4342a_defconfig

@@ -7,3 +7,7 @@ CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_CLOCK_CONTROL=y
+CONFIG_MEMC=y
+
+CONFIG_CLOCK_CONTROL_INIT_PRIORITY=28
+CONFIG_MEMC_INIT_PRIORITY=29

dts/arm/silabs/siwg917.dtsi

@@ -88,6 +88,14 @@
 			};
 		};
 
+		psramctrl0: memory-controller@12040000 {
+			compatible = "silabs,siwx91x-qspi-memory";
+			reg = <0x12040000 0x200>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
+
 		ulpuart: uart@24041800 {
 			compatible = "ns16550";
 			reg = <0x24041800 0x1000>;