dts: i2s: add i2s node for max32655fthr

- add basic dma only i2s dts binding for max32-i2s
- add i2s node with defaul config to max32655.dtsi
- add i2s pin definition for max32655fthr baord as per spec

Signed-off-by: Anuj Pathak <anuj@croxel.com>

Author: cx-anuj-pathak

boards/adi/max32655fthr/max32655fthr_max32655_m4.dts

@@ -148,6 +148,12 @@
 	status = "okay";
 };
 
+&i2s0 {
+	status = "okay";
+	pinctrl-0 = <&i2s_sck_p1_2 &i2s_ws_p1_3 &i2s_sdi_p1_4 &i2s_sdo_p1_5>;
+	pinctrl-names = "default";
+};
+
 &wdt0 {
 	status = "okay";
 };

dts/arm/adi/max32/max32655.dtsi

@@ -149,5 +149,22 @@
 			interrupts = <67 0>;
 			status = "disabled";
 		};
+
+		i2s0: i2s0@40060000 {
+			compatible = "adi,max32-i2s";
+			reg = <0x40060000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			/* 
+			 * DMA Configuration is provided as an example.
+			 * user is free to change dma channel index, 
+			 * but tx and rx slot should be 0x3e and 0x1e respectively.
+			 *
+			 * ref to MAX32655 Reference Manual
+			 * Table 6-1. I2S DMA Channel Assignments
+			 */
+			dmas = <&dma0 0 0x3e>, <&dma0 1 0x1e>;
+			dma-names = "tx", "rx";
+		};
 	};
 };

dts/bindings/i2s/adi,max32-i2s.yaml

@@ -0,0 +1,38 @@
+# Copyright (c) 2025 Croxel Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Analog Devices MAX32 series I2S controller
+
+compatible: "adi,max32-i2s"
+
+include: [i2s-controller.yaml, pinctrl-device.yaml]
+
+properties:
+  reg:
+    required: true
+
+  pinctrl-0:
+    required: true
+    description: |
+      GPIO pin configuration for I2S signals. The required signals are:
+      - I2S_WS (Word Select/Frame sync)
+      - I2S_SCK (Bit clock) 
+      - I2S_SDO (Serial data output)
+      - I2S_SDI (Serial data input)
+
+  pinctrl-names:
+    required: true
+
+  dmas:
+    required: true
+    description: |
+      DMA channels for RX and TX. Two channels must be provided in the following order:
+      - RX DMA channel
+      - TX DMA channel
+
+  dma-names:
+    required: true
+    description: |
+      Names of DMA channels for RX and TX. Must be provided in the following order:
+      - rx
+      - tx