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bjarki-andreasenbjarki-andreasen
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soc: nordic: nrf54h: transition from gpd to zephyr pinctrl and pds
Transition nrf54h away from the soc specific gpd (global power domain) driver which mixed power domains, pinctrl and gpio pin retention into a non scalable solution, forcing soc specific logic to bleed into nrf drivers. The new solution uses zephyrs PM_DEVICE based power domains to properly model the hardware layout of device and pin power domains, and moves pin retention logic out of drivers into pinctrl and gpio, which are the components which manage pins (pads). Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
1 parent 88d003b commit cdf841b

28 files changed

+612
-390
lines changed

‎drivers/can/can_nrf.c

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -17,10 +17,6 @@
1717
#include <zephyr/drivers/pinctrl.h>
1818
#include <zephyr/irq.h>
1919

20-
#ifdef CONFIG_SOC_NRF54H20_GPD
21-
#include <nrf/gpd.h>
22-
#endif
23-
2420
/* nRF CAN wrapper offsets */
2521
#define CAN_TASKS_START offsetof(NRF_CAN_Type, TASKS_START)
2622
#define CAN_EVENTS_CORE_0 offsetof(NRF_CAN_Type, EVENTS_CORE[0])
@@ -187,13 +183,6 @@ static int can_nrf_init(const struct device *dev)
187183
sys_write32(CAN_INTEN_CORE0_Msk | CAN_INTEN_CORE1_Msk, config->wrapper + CAN_INTEN);
188184
sys_write32(1U, config->wrapper + CAN_TASKS_START);
189185

190-
#ifdef CONFIG_SOC_NRF54H20_GPD
191-
ret = nrf_gpd_retain_pins_set(config->pcfg, false);
192-
if (ret < 0) {
193-
return ret;
194-
}
195-
#endif
196-
197186
config->irq_configure();
198187

199188
ret = can_mcan_configure_mram(dev, config->mrba, config->mram);

‎drivers/counter/counter_nrfx_timer.c

Lines changed: 4 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -35,23 +35,9 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME, LOG_LEVEL);
3535
#define MAYBE_CONST_CONFIG const
3636
#endif
3737

38-
#ifdef CONFIG_SOC_NRF54H20_GPD
39-
#include <nrf/gpd.h>
40-
41-
#define NRF_CLOCKS_INSTANCE_IS_FAST(node) \
42-
COND_CODE_1(DT_NODE_HAS_PROP(node, power_domains), \
43-
(IS_EQ(DT_PHA(node, power_domains, id), NRF_GPD_FAST_ACTIVE1)), \
44-
(0))
45-
46-
/* Macro must resolve to literal 0 or 1 */
47-
#define INSTANCE_IS_FAST(idx) NRF_CLOCKS_INSTANCE_IS_FAST(DT_DRV_INST(idx))
48-
49-
#define INSTANCE_IS_FAST_OR(idx) INSTANCE_IS_FAST(idx) ||
50-
51-
#if (DT_INST_FOREACH_STATUS_OKAY(INSTANCE_IS_FAST_OR) 0)
38+
#if NRF_DT_INST_ANY_IS_FAST
5239
#define COUNTER_ANY_FAST 1
5340
#endif
54-
#endif
5541

5642
struct counter_nrfx_data {
5743
counter_top_callback_t top_cb;
@@ -474,13 +460,13 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
474460
* which is using nrfs (IPC) are initialized later.
475461
*/
476462
#define TIMER_INIT_LEVEL(idx) \
477-
COND_CODE_1(INSTANCE_IS_FAST(idx), (POST_KERNEL), (PRE_KERNEL_1))
463+
COND_CODE_1(NRF_DT_INST_IS_FAST(idx), (POST_KERNEL), (PRE_KERNEL_1))
478464

479465
/* Get initialization priority of an instance. Instances that requires clock control
480466
* which is using nrfs (IPC) are initialized later.
481467
*/
482468
#define TIMER_INIT_PRIO(idx) \
483-
COND_CODE_1(INSTANCE_IS_FAST(idx), \
469+
COND_CODE_1(NRF_DT_INST_IS_FAST(idx), \
484470
(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
485471
(CONFIG_COUNTER_INIT_PRIORITY))
486472

@@ -536,7 +522,7 @@ static DEVICE_API(counter, counter_nrfx_driver_api) = {
536522
}, \
537523
.ch_data = counter##idx##_ch_data, \
538524
.timer = (NRF_TIMER_Type *)DT_INST_REG_ADDR(idx), \
539-
IF_ENABLED(INSTANCE_IS_FAST(idx), \
525+
IF_ENABLED(NRF_DT_INST_IS_FAST(idx), \
540526
(.clk_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_DRV_INST(idx))), \
541527
.clk_spec = { \
542528
.frequency = NRF_PERIPH_GET_FREQUENCY(DT_DRV_INST(idx)), \

‎drivers/gpio/gpio_nrfx.c

Lines changed: 15 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -16,8 +16,10 @@
1616

1717
#include <zephyr/drivers/gpio/gpio_utils.h>
1818

19-
#ifdef CONFIG_SOC_NRF54H20_GPD
20-
#include <nrf/gpd.h>
19+
#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_gpio_pad_group)
20+
#define NRF_GPIO_HAS_PAD_GROUP 1
21+
#else
22+
#define NRF_GPIO_HAS_PAD_GROUP 0
2123
#endif
2224

2325
struct gpio_nrfx_data {
@@ -33,8 +35,8 @@ struct gpio_nrfx_cfg {
3335
uint32_t edge_sense;
3436
uint8_t port_num;
3537
nrfx_gpiote_t gpiote;
36-
#ifdef CONFIG_SOC_NRF54H20_GPD
37-
uint8_t pad_pd;
38+
#if NRF_GPIO_HAS_PAD_GROUP
39+
const struct device *pad_group;
3840
#endif
3941
};
4042

@@ -64,30 +66,6 @@ static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags)
6466
return NRF_GPIO_PIN_NOPULL;
6567
}
6668

67-
static void gpio_nrfx_gpd_retain_set(const struct device *port, uint32_t mask)
68-
{
69-
#ifdef CONFIG_SOC_NRF54H20_GPD
70-
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
71-
72-
nrf_gpio_port_retain_enable(cfg->port, mask);
73-
#else
74-
ARG_UNUSED(port);
75-
ARG_UNUSED(mask);
76-
#endif
77-
}
78-
79-
static void gpio_nrfx_gpd_retain_clear(const struct device *port, uint32_t mask)
80-
{
81-
#ifdef CONFIG_SOC_NRF54H20_GPD
82-
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
83-
84-
nrf_gpio_port_retain_disable(cfg->port, mask);
85-
#else
86-
ARG_UNUSED(port);
87-
ARG_UNUSED(mask);
88-
#endif
89-
}
90-
9169
static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
9270
gpio_flags_t flags)
9371
{
@@ -134,8 +112,6 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
134112
return ret;
135113
}
136114

137-
gpio_nrfx_gpd_retain_clear(port, BIT(pin));
138-
139115
if (flags & GPIO_OUTPUT_INIT_HIGH) {
140116
nrf_gpio_port_out_set(cfg->port, BIT(pin));
141117
} else if (flags & GPIO_OUTPUT_INIT_LOW) {
@@ -216,7 +192,6 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin,
216192
}
217193

218194
end:
219-
gpio_nrfx_gpd_retain_set(port, BIT(pin));
220195
return pm_device_runtime_put(port);
221196
}
222197

@@ -317,10 +292,8 @@ static int gpio_nrfx_port_set_masked_raw(const struct device *port,
317292
return ret;
318293
}
319294

320-
gpio_nrfx_gpd_retain_clear(port, mask);
321295
nrf_gpio_port_out_set(reg, set_mask);
322296
nrf_gpio_port_out_clear(reg, clear_mask);
323-
gpio_nrfx_gpd_retain_set(port, mask);
324297
return pm_device_runtime_put(port);
325298
}
326299

@@ -335,9 +308,7 @@ static int gpio_nrfx_port_set_bits_raw(const struct device *port,
335308
return ret;
336309
}
337310

338-
gpio_nrfx_gpd_retain_clear(port, mask);
339311
nrf_gpio_port_out_set(reg, mask);
340-
gpio_nrfx_gpd_retain_set(port, mask);
341312
return pm_device_runtime_put(port);
342313
}
343314

@@ -352,9 +323,7 @@ static int gpio_nrfx_port_clear_bits_raw(const struct device *port,
352323
return ret;
353324
}
354325

355-
gpio_nrfx_gpd_retain_clear(port, mask);
356326
nrf_gpio_port_out_clear(reg, mask);
357-
gpio_nrfx_gpd_retain_set(port, mask);
358327
return pm_device_runtime_put(port);
359328
}
360329

@@ -372,10 +341,8 @@ static int gpio_nrfx_port_toggle_bits(const struct device *port,
372341
return ret;
373342
}
374343

375-
gpio_nrfx_gpd_retain_clear(port, mask);
376344
nrf_gpio_port_out_set(reg, set_mask);
377345
nrf_gpio_port_out_clear(reg, clear_mask);
378-
gpio_nrfx_gpd_retain_set(port, mask);
379346
return pm_device_runtime_put(port);
380347
}
381348

@@ -546,14 +513,10 @@ static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin,
546513

547514
static int gpio_nrfx_pm_suspend(const struct device *port)
548515
{
549-
#ifdef CONFIG_SOC_NRF54H20_GPD
516+
#if NRF_GPIO_HAS_PAD_GROUP
550517
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
551518

552-
if (cfg->pad_pd != NRF_GPD_FAST_ACTIVE1) {
553-
return 0;
554-
}
555-
556-
return nrf_gpd_release(NRF_GPD_FAST_ACTIVE1);
519+
return pm_device_runtime_put(cfg->pad_group);
557520
#else
558521
ARG_UNUSED(port);
559522
return 0;
@@ -562,14 +525,10 @@ static int gpio_nrfx_pm_suspend(const struct device *port)
562525

563526
static int gpio_nrfx_pm_resume(const struct device *port)
564527
{
565-
#ifdef CONFIG_SOC_NRF54H20_GPD
528+
#if NRF_GPIO_HAS_PAD_GROUP
566529
const struct gpio_nrfx_cfg *cfg = get_port_cfg(port);
567530

568-
if (cfg->pad_pd != NRF_GPD_FAST_ACTIVE1) {
569-
return 0;
570-
}
571-
572-
return nrf_gpd_request(NRF_GPD_FAST_ACTIVE1);
531+
return pm_device_runtime_get(cfg->pad_group);
573532
#else
574533
ARG_UNUSED(port);
575534
return 0;
@@ -660,12 +619,11 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = {
660619
"Please enable GPIOTE instance for used GPIO port!")), \
661620
())
662621

663-
#ifdef CONFIG_SOC_NRF54H20_GPD
664-
#define PAD_PD(inst) \
665-
.pad_pd = DT_INST_PHA_BY_NAME_OR(inst, power_domains, pad, id, \
666-
NRF_GPD_SLOW_MAIN),
622+
#if NRF_GPIO_HAS_PAD_GROUP
623+
#define GPIO_NRF_PAD_GROUP_INIT(id) \
624+
.pad_group = DEVICE_DT_GET(DT_INST_CHILD(id, pad_group)),
667625
#else
668-
#define PAD_PD(inst)
626+
#define GPIO_NRF_PAD_GROUP_INIT(id)
669627
#endif
670628

671629
#define GPIO_NRF_DEVICE(id) \
@@ -679,7 +637,7 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = {
679637
.port_num = DT_INST_PROP(id, port), \
680638
.edge_sense = DT_INST_PROP_OR(id, sense_edge_mask, 0), \
681639
.gpiote = GPIOTE_INSTANCE(id), \
682-
PAD_PD(id) \
640+
GPIO_NRF_PAD_GROUP_INIT(id) \
683641
}; \
684642
\
685643
static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \

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