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drivers: flash: flash_mcux_flexspi_hyperflash: disable cache during prgm
Disable the cache during erase and programming operations, as cache pre-fetch operations can cause flash access outside of the application's control Also, reduce the SCLK frequency used after erase operations to 200MHz. Without this, the RT1050 appears to hang after flash program operations Signed-off-by: Daniel DeGrasse <ddegrasse@tenstorrent.com>
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+14
-9
lines changed

1 file changed

+14
-9
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drivers/flash/flash_mcux_flexspi_hyperflash.c

Lines changed: 14 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include <zephyr/kernel.h>
1111
#include <errno.h>
1212
#include <zephyr/drivers/flash.h>
13+
#include <zephyr/cache.h>
1314

1415
#include <zephyr/logging/log.h>
1516

@@ -416,7 +417,6 @@ static int flash_flexspi_hyperflash_write(const struct device *dev, off_t offset
416417
const void *buffer, size_t len)
417418
{
418419
struct flash_flexspi_hyperflash_data *data = dev->data;
419-
size_t size = len;
420420
uint8_t *src = (uint8_t *)buffer;
421421
unsigned int key = 0;
422422
int i, j;
@@ -429,6 +429,9 @@ static int flash_flexspi_hyperflash_write(const struct device *dev, off_t offset
429429
return -EINVAL;
430430
}
431431

432+
sys_cache_instr_disable();
433+
sys_cache_data_disable();
434+
432435
if (memc_flexspi_is_running_xip(&data->controller)) {
433436
/*
434437
* ==== ENTER CRITICAL SECTION ====
@@ -490,13 +493,12 @@ static int flash_flexspi_hyperflash_write(const struct device *dev, off_t offset
490493
len -= i;
491494
}
492495

493-
/* Clock FlexSPI at 332 MHZ (166 MHz SCLK in DDR mode) */
496+
/* Clock FlexSPI at 200 MHZ (100 MHz SCLK in DDR mode) */
494497
(void)memc_flexspi_update_clock(&data->controller, &data->config,
495-
data->port, MHZ(332));
498+
data->port, MHZ(200));
496499

497-
#ifdef CONFIG_HAS_MCUX_CACHE
498-
DCACHE_InvalidateByRange((uint32_t) dst, size);
499-
#endif
500+
sys_cache_instr_enable();
501+
sys_cache_data_enable();
500502

501503
if (memc_flexspi_is_running_xip(&data->controller)) {
502504
/* ==== EXIT CRITICAL SECTION ==== */
@@ -518,6 +520,10 @@ static int flash_flexspi_hyperflash_erase(const struct device *dev, off_t offset
518520
data->port,
519521
offset);
520522

523+
524+
sys_cache_instr_disable();
525+
sys_cache_data_disable();
526+
521527
if (!dst) {
522528
return -EINVAL;
523529
}
@@ -576,9 +582,8 @@ static int flash_flexspi_hyperflash_erase(const struct device *dev, off_t offset
576582
offset += SPI_HYPERFLASH_SECTOR_SIZE;
577583
}
578584

579-
#ifdef CONFIG_HAS_MCUX_CACHE
580-
DCACHE_InvalidateByRange((uint32_t) dst, size);
581-
#endif
585+
sys_cache_instr_enable();
586+
sys_cache_data_enable();
582587

583588
if (memc_flexspi_is_running_xip(&data->controller)) {
584589
/* ==== EXIT CRITICAL SECTION ==== */

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