drivers: spi: spi_context: exclude gpio code if no gpio cs

exclude gpio code if no gpio cs are used
for that spi driver.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>

Author: maass-hamburg

drivers/spi/spi_context.h

@@ -21,6 +21,10 @@
 extern "C" {
 #endif
 
+#if defined(DT_DRV_COMPAT) && !DT_ANY_INST_HAS_PROP_STATUS_OKAY(cs_gpios)
+#define DT_SPI_CTX_HAS_NO_CS_GPIOS
+#endif
+
 enum spi_ctx_runtime_op_mode {
 	SPI_CTX_RUNTIME_OP_MODE_MASTER = BIT(0),
 	SPI_CTX_RUNTIME_OP_MODE_SLAVE  = BIT(1),
@@ -31,8 +35,10 @@ struct spi_context {
 #ifdef CONFIG_MULTITHREADING
 	const struct spi_config *owner;
 #endif
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 	const struct gpio_dt_spec *cs_gpios;
 	size_t num_cs_gpios;
+#endif /* !DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 #ifdef CONFIG_MULTITHREADING
 	struct k_sem lock;
@@ -71,6 +77,7 @@ struct spi_context {
 #define SPI_CONTEXT_INIT_SYNC(_data, _ctx_name)				\
 	._ctx_name.sync = Z_SEM_INITIALIZER(_data._ctx_name.sync, 0, 1)
 
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 #define SPI_CONTEXT_CS_GPIO_SPEC_ELEM(_node_id, _prop, _idx)		\
 	GPIO_DT_SPEC_GET_BY_IDX(_node_id, _prop, _idx),
 
@@ -84,6 +91,9 @@ struct spi_context {
 			    (SPI_CONTEXT_CS_GPIOS_FOREACH_ELEM(_node_id)), ({0}))	\
 	},										\
 	._ctx_name.num_cs_gpios = DT_PROP_LEN_OR(_node_id, cs_gpios, 0),
+#else /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
+#define SPI_CONTEXT_CS_GPIOS_INITIALIZE(...)
+#endif /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 /*
  * Checks if a spi config is the same as the one stored in the spi_context
@@ -300,8 +310,9 @@ static inline void spi_context_complete(struct spi_context *ctx,
  * Note: If a controller has native CS control in SPI hardware, they should also be initialized
  * during device init by the driver with hardware-specific code.
  */
-static inline int spi_context_cs_configure_all(struct spi_context *ctx)
+static inline int spi_context_cs_configure_all(struct spi_context *ctx __maybe_unused)
 {
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 	int ret;
 	const struct gpio_dt_spec *cs_gpio;
 
@@ -317,13 +328,16 @@ static inline int spi_context_cs_configure_all(struct spi_context *ctx)
 			return ret;
 		}
 	}
+#endif /* !DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 	return 0;
 }
 
 /* Helper function to power manage the GPIO CS pins, not meant to be used directly by drivers */
-static inline int _spi_context_cs_pm_all(struct spi_context *ctx, bool get)
+static inline int _spi_context_cs_pm_all(struct spi_context *ctx __maybe_unused,
+					 bool get __maybe_unused)
 {
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 	const struct gpio_dt_spec *cs_gpio;
 	int ret;
 
@@ -338,6 +352,7 @@ static inline int _spi_context_cs_pm_all(struct spi_context *ctx, bool get)
 			return ret;
 		}
 	}
+#endif /* !DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 	return 0;
 }
@@ -361,9 +376,10 @@ static inline int spi_context_cs_put_all(struct spi_context *ctx)
 }
 
 /* Helper function to control the GPIO CS, not meant to be used directly by drivers */
-static inline void _spi_context_cs_control(struct spi_context *ctx,
-					   bool on, bool force_off)
+static inline void _spi_context_cs_control(struct spi_context *ctx __maybe_unused,
+					   bool on __maybe_unused, bool force_off __maybe_unused)
 {
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 	if (ctx->config && spi_cs_is_gpio(ctx->config)) {
 		if (on) {
 			gpio_pin_set_dt(&ctx->config->cs.gpio, 1);
@@ -378,6 +394,7 @@ static inline void _spi_context_cs_control(struct spi_context *ctx,
 			gpio_pin_set_dt(&ctx->config->cs.gpio, 0);
 		}
 	}
+#endif /* !DT_SPI_CTX_HAS_NO_CS_GPIOS */
 }
 
 /* This function should be called by drivers to control the chip select line in master mode

drivers/spi/spi_esp32_spim.c

@@ -106,7 +106,7 @@ static int IRAM_ATTR spi_esp32_transfer(const struct device *dev)
 
 	/* keep cs line active until last transmission */
 	hal_trans->cs_keep_active =
-		(!ctx->num_cs_gpios &&
+		(UTIL_OR(IS_ENABLED(DT_SPI_CTX_HAS_NO_CS_GPIOS), (ctx->num_cs_gpios == 0)) &&
 		 (ctx->rx_count > 1 || ctx->tx_count > 1 || ctx->rx_len > transfer_len_frames ||
 		  ctx->tx_len > transfer_len_frames));
 
@@ -382,9 +382,10 @@ static int IRAM_ATTR spi_esp32_configure(const struct device *dev,
 	 * Workaround for ESP32S3 and ESP32Cx SoC's. This dummy transaction is needed
 	 * to sync CLK and software controlled CS when SPI is in mode 3
 	 */
-#if defined(CONFIG_SOC_SERIES_ESP32S3) || defined(CONFIG_SOC_SERIES_ESP32C2) ||                    \
-	defined(CONFIG_SOC_SERIES_ESP32C3) || defined(CONFIG_SOC_SERIES_ESP32C6)
-	if (ctx->num_cs_gpios && (hal_dev->mode & (SPI_MODE_CPOL | SPI_MODE_CPHA))) {
+#if (defined(CONFIG_SOC_SERIES_ESP32S3) || defined(CONFIG_SOC_SERIES_ESP32C2) ||                   \
+	defined(CONFIG_SOC_SERIES_ESP32C3) || defined(CONFIG_SOC_SERIES_ESP32C6)) &&               \
+	!defined(DT_SPI_CTX_HAS_NO_CS_GPIOS)
+	if ((ctx->num_cs_gpios != 0) && (hal_dev->mode & (SPI_MODE_CPOL | SPI_MODE_CPHA))) {
 		spi_esp32_transfer(dev);
 	}
 #endif

drivers/spi/spi_numaker.c

@@ -129,10 +129,10 @@ static int spi_numaker_configure(const struct device *dev, const struct spi_conf
 	/* Enable the automatic hardware slave select function. Select the SS pin and configure as
 	 * low-active.
 	 */
-	if (data->ctx.num_cs_gpios != 0) {
-		SPI_EnableAutoSS(dev_cfg->spi, SPI_SS, SPI_SS_ACTIVE_LOW);
-	} else {
+	if (UTIL_OR(IS_ENABLED(DT_SPI_CTX_HAS_NO_CS_GPIOS), data->ctx.num_cs_gpios == 0)) {
 		SPI_DisableAutoSS(dev_cfg->spi);
+	} else {
+		SPI_EnableAutoSS(dev_cfg->spi, SPI_SS, SPI_SS_ACTIVE_LOW);
 	}
 
 	/* Be able to set TX/RX FIFO threshold, for ex: SPI_SetFIFO(dev_cfg->spi, 2, 2) */