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drivers: pinctrl: wch: remove useless operations
Remove redundant register updates in pinctrl_configure_pins, and replace the improper (and inefficient) use of bitwise OR assignment (|=) with direct assignments when writing to the write-only BSHR registers Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
1 parent 2c43a00 commit b4e4c8e

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3 files changed

+6
-15
lines changed

3 files changed

+6
-15
lines changed

drivers/pinctrl/pinctrl_wch_00x_afio.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -46,14 +46,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
4646
regs->CFGLR = (regs->CFGLR & ~(0x0F << (pin * 4))) | (cfg << (pin * 4));
4747

4848
if (pins->output_high) {
49-
regs->OUTDR |= BIT(pin);
50-
regs->BSHR |= BIT(pin);
49+
regs->BSHR = BIT(pin);
5150
} else if (pins->output_low) {
52-
regs->OUTDR |= BIT(pin);
5351
/* Reset the pin. */
54-
regs->BSHR |= BIT(pin + 16);
52+
regs->BCR = BIT(pin);
5553
} else {
56-
regs->OUTDR &= ~(1 << pin);
5754
if (pins->bias_pull_up) {
5855
regs->BSHR = BIT(pin);
5956
}

drivers/pinctrl/pinctrl_wch_20x_30x_afio.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -55,14 +55,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
5555
(cfg << ((pin - 8) * 4));
5656
}
5757
if (pins->output_high) {
58-
regs->OUTDR |= BIT(pin);
59-
regs->BSHR |= BIT(pin);
58+
regs->BSHR = BIT(pin);
6059
} else if (pins->output_low) {
61-
regs->OUTDR |= BIT(pin);
6260
/* Reset the pin. */
63-
regs->BSHR |= BIT(pin + 16);
61+
regs->BCR = BIT(pin);
6462
} else {
65-
regs->OUTDR &= ~BIT(pin);
6663
if (pins->bias_pull_up) {
6764
regs->BSHR = BIT(pin);
6865
}

drivers/pinctrl/pinctrl_wch_afio.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -45,14 +45,11 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
4545
regs->CFGLR = (regs->CFGLR & ~(0x0F << (pin * 4))) | (cfg << (pin * 4));
4646

4747
if (pins->output_high) {
48-
regs->OUTDR |= BIT(pin);
49-
regs->BSHR |= BIT(pin);
48+
regs->BSHR = BIT(pin);
5049
} else if (pins->output_low) {
51-
regs->OUTDR |= BIT(pin);
5250
/* Reset the pin. */
53-
regs->BSHR |= BIT(pin + 16);
51+
regs->BCR = BIT(pin);
5452
} else {
55-
regs->OUTDR &= ~(1 << pin);
5653
if (pins->bias_pull_up) {
5754
regs->BSHR = BIT(pin);
5855
}

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