dts: bindings: neorv32: use vendor prefix

Use vendor prefix "neorv32" for all peripherals provided by the NEORV32
RISV-V Processor project.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>

Author: henrikbrixandersen

doc/releases/release-notes-3.2.rst

@@ -1112,7 +1112,7 @@ Devicetree
     * :dtcompatible:`microchip,xec-espi`
     * :dtcompatible:`microchip,xec-i2c`
     * :dtcompatible:`microchip,xec-qmspi`
-    * :dtcompatible:`neorv32-machine-timer`
+    * :dtcompatible:`neorv32,machine-timer`
     * :dtcompatible:`nordic,nrf-ieee802154`
     * :dtcompatible:`nuclei,systimer`
     * :dtcompatible:`nuvoton,npcx-leakage-io`

doc/releases/release-notes-3.5.rst

@@ -1022,7 +1022,7 @@ Bindings
     * The ``riscv,isa`` property used by RISC-V CPU bindings no longer has an
       ``enum`` value.
 
-    * :dtcompatible:`neorv32-cpu`:
+    * :dtcompatible:`neorv32,cpu`:
 
           * new property: ``mmu-type``
           * new property: ``riscv,isa``

dts/bindings/cpu/neorv32-cpu.yaml renamed to dts/bindings/cpu/neorv32,cpu.yaml

@@ -3,6 +3,6 @@
 
 description: NEORV32 RISC-V CPU
 
-compatible: "neorv32-cpu"
+compatible: "neorv32,cpu"
 
 include: riscv,cpus.yaml

dts/bindings/gpio/neorv32-gpio.yaml renamed to dts/bindings/gpio/neorv32,gpio.yaml

@@ -1,6 +1,6 @@
 description: NEORV32 GPIO
 
-compatible: "neorv32-gpio"
+compatible: "neorv32,gpio"
 
 include: [gpio-controller.yaml, base.yaml]
 

dts/bindings/rng/neorv32-trng.yaml renamed to dts/bindings/rng/neorv32,trng.yaml

@@ -1,6 +1,6 @@
 description: NEORV32 True Random Number Generator (TRNG)
 
-compatible: "neorv32-trng"
+compatible: "neorv32,trng"
 
 include: base.yaml
 

dts/bindings/serial/neorv32-uart.yaml renamed to dts/bindings/serial/neorv32,uart.yaml

@@ -1,6 +1,6 @@
 description: NEORV32 UART
 
-compatible: "neorv32-uart"
+compatible: "neorv32,uart"
 
 include: uart-controller.yaml
 

dts/bindings/vendor-prefixes.txt

@@ -452,6 +452,7 @@ myir	MYIR Tech Limited
 national	National Semiconductor
 nec	NEC LCD Technologies, Ltd.
 neonode	Neonode Inc.
+neorv32	NEORV32 RISC-V Processor
 netgear	NETGEAR
 netlogic	Broadcom Corporation (formerly NetLogic Microsystems)
 netron-dy	Netron DY

dts/riscv/neorv32.dtsi

@@ -19,7 +19,7 @@
 		#size-cells = <0>;
 
 		cpu0: cpu@0 {
-			compatible = "neorv32-cpu", "riscv";
+			compatible = "neorv32,cpu", "riscv";
 			reg = <0>;
 			device_type = "cpu";
 
@@ -74,13 +74,13 @@
 		};
 
 		bootrom: rom@ffe00000 {
-			compatible = "neorv32-bootrom", "mmio-sram";
+			compatible = "neorv32,bootrom", "mmio-sram";
 			status = "disabled";
 			reg = <0xffe00000 0x10000>;
 		};
 
 		clint: clint@fff40000 {
-			compatible = "neorv32-clint", "sifive,clint0";
+			compatible = "neorv32,clint", "sifive,clint0";
 			status = "disabled";
 			reg = <0xfff40000 0x10000>;
 			interrupts-extended = <&intc 3>;
@@ -95,7 +95,7 @@
 		};
 
 		uart0: serial@fff50000 {
-			compatible = "neorv32-uart";
+			compatible = "neorv32,uart";
 			status = "disabled";
 			reg = <0xfff50000 0x10000>;
 			interrupts = <2>, <3>;
@@ -104,7 +104,7 @@
 		};
 
 		uart1: serial@fff60000 {
-			compatible = "neorv32-uart";
+			compatible = "neorv32,uart";
 			status = "disabled";
 			reg = <0xfff60000 0x10000>;
 			interrupts = <4>, <5>;
@@ -113,14 +113,14 @@
 		};
 
 		trng: rng@fffa0000 {
-			compatible = "neorv32-trng";
+			compatible = "neorv32,trng";
 			status = "disabled";
 			reg = <0xfffa0000 0x10000>;
 			syscon = <&sysinfo>;
 		};
 
 		gpio: gpio@fffc0000 {
-			compatible = "neorv32-gpio";
+			compatible = "neorv32,gpio";
 			status = "disabled";
 			reg = <0xfffc0000 0x10000>;
 			syscon = <&sysinfo>;