drivers: ethernet: Add runtime MAC address generation

Add support to generate the random MAC if 'zephyr,random-mac-address'
is set,uses 'local-mac-address' from DT if available, or falls back
to a default Xilinx OUI-based MAC with zeroed bytes

Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>

Author: venodela

drivers/ethernet/eth_xilinx_axienet.c

@@ -5,6 +5,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#define DT_DRV_COMPAT xlnx_axi_ethernet_1_00_a
+
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(eth_xilinx_axienet, CONFIG_ETHERNET_LOG_LEVEL);
 
@@ -16,6 +18,7 @@ LOG_MODULE_REGISTER(eth_xilinx_axienet, CONFIG_ETHERNET_LOG_LEVEL);
 #include <zephyr/net/phy.h>
 #include <zephyr/irq.h>
 #include <zephyr/sys/barrier.h>
+#include "eth.h"
 
 #include "../dma/dma_xilinx_axi_dma.h"
 
@@ -48,6 +51,11 @@ LOG_MODULE_REGISTER(eth_xilinx_axienet, CONFIG_ETHERNET_LOG_LEVEL);
 #define XILINX_AXIENET_UNICAST_ADDRESS_WORD_0_OFFSET 0x00000700
 #define XILINX_AXIENET_UNICAST_ADDRESS_WORD_1_OFFSET 0x00000704
 
+/* Xilinx OUI (Organizationally Unique Identifier) for MAC */
+#define XILINX_OUI_BYTE_0  0x00
+#define XILINX_OUI_BYTE_1  0x0A
+#define XILINX_OUI_BYTE_2  0x35
+
 #if (CONFIG_DCACHE_LINE_SIZE > 0)
 /* cache-line aligned to allow selective cache-line invalidation on the buffer */
 #define XILINX_AXIENET_ETH_ALIGN CONFIG_DCACHE_LINE_SIZE
@@ -498,6 +506,27 @@ static int xilinx_axienet_send(const struct device *dev, struct net_pkt *pkt)
 	return setup_dma_tx_transfer(dev, config, data, pkt_len);
 }
 
+static void xilinx_axienet_generate_mac_address(uint8_t *mac_addr)
+{
+#if DT_INST_PROP(0, zephyr_random_mac_address)
+	/* Generate random MAC address using Xilinx OUI as vendor prefix */
+	gen_random_mac(mac_addr, XILINX_OUI_BYTE_0, XILINX_OUI_BYTE_1, XILINX_OUI_BYTE_2);
+#elif DT_INST_NODE_HAS_PROP(0, local_mac_address)
+	/* Use provided MAC address from device tree */
+	uint8_t dt_mac[] = DT_INST_PROP(0, local_mac_address);
+
+	memcpy(mac_addr, dt_mac, NET_ETH_ADDR_LEN);
+#else
+	/* Default fallback - use Xilinx OUI with all zeros for device-specific part */
+	mac_addr[0] = XILINX_OUI_BYTE_0;
+	mac_addr[1] = XILINX_OUI_BYTE_1;
+	mac_addr[2] = XILINX_OUI_BYTE_2;
+	mac_addr[3] = 0x00;
+	mac_addr[4] = 0x00;
+	mac_addr[5] = 0x00;
+#endif
+}
+
 static int xilinx_axienet_probe(const struct device *dev)
 {
 	const struct xilinx_axienet_config *config = dev->config;
@@ -540,6 +569,9 @@ static int xilinx_axienet_probe(const struct device *dev)
 	LOG_INF("TX Checksum offloading %s",
 		config->have_tx_csum_offload ? "requested" : "disabled");
 
+	/* Generate MAC address at runtime */
+	xilinx_axienet_generate_mac_address(data->mac_addr);
+
 	xilinx_axienet_set_mac_address(config, data);
 
 	for (int i = 0; i < CONFIG_ETH_XILINX_AXIENET_BUFFER_NUM_RX - 1; i++) {
@@ -586,7 +618,6 @@ static const struct ethernet_api xilinx_axienet_api = {
 	}                                                                                          \
                                                                                                    \
 	static struct xilinx_axienet_data data_##inst = {                                          \
-		.mac_addr = DT_INST_PROP_OR(inst, local_mac_address, {0}),                         \
 		.dma_is_configured_rx = false,                                                     \
 		.dma_is_configured_tx = false};                                                    \
 	static const struct xilinx_axienet_config config_##inst = {                                \
@@ -603,5 +634,4 @@ static const struct ethernet_api xilinx_axienet_api = {
 				      &config_##inst, CONFIG_ETH_INIT_PRIORITY,                    \
 				      &xilinx_axienet_api, NET_ETH_MTU);
 
-#define DT_DRV_COMPAT xlnx_axi_ethernet_1_00_a
 DT_INST_FOREACH_STATUS_OKAY(XILINX_AXIENET_INIT);