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GTLin08kartben
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soc/ite/ec/common: Rename functions to use generic names
Renamed two functions and a macro to use more generic names, removing chip-specific identifiers. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
1 parent 4aaa0f8 commit a8e467c

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2 files changed

+10
-7
lines changed

2 files changed

+10
-7
lines changed

soc/ite/ec/common/soc_espi.h

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,23 +14,26 @@
1414
extern "C" {
1515
#endif
1616

17-
#define ESPI_IT8XXX2_SOC_DEV DEVICE_DT_GET(DT_NODELABEL(espi0))
17+
#define ESPI_IT8XXX2_SOC_DEV DEVICE_DT_GET(DT_NODELABEL(espi0))
18+
#define ESPI_ITE_SOC_DEV ESPI_IT8XXX2_SOC_DEV
19+
#define espi_ite_ec_enable_pad_ctrl espi_it8xxx2_enable_pad_ctrl
20+
#define espi_ite_ec_enable_trans_irq espi_it8xxx2_enable_trans_irq
1821

1922
/**
2023
* @brief eSPI input pad gating
2124
*
2225
* @param dev pointer to eSPI device
2326
* @param enable/disable eSPI pad
2427
*/
25-
void espi_it8xxx2_enable_pad_ctrl(const struct device *dev, bool enable);
28+
void espi_ite_ec_enable_pad_ctrl(const struct device *dev, bool enable);
2629

2730
/**
2831
* @brief eSPI transaction interrupt control
2932
*
3033
* @param dev pointer to eSPI device
3134
* @param enable/disable eSPI transaction interrupt
3235
*/
33-
void espi_it8xxx2_enable_trans_irq(const struct device *dev, bool enable);
36+
void espi_ite_ec_enable_trans_irq(const struct device *dev, bool enable);
3437

3538
#ifdef __cplusplus
3639
}

soc/ite/ec/it8xxx2/soc.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -220,13 +220,13 @@ static void chip_configure_pll(const struct pll_config_t *pll)
220220
* We have to disable eSPI pad before changing
221221
* PLL sequence or sequence will fail if CS# pin is low.
222222
*/
223-
espi_it8xxx2_enable_pad_ctrl(ESPI_IT8XXX2_SOC_DEV, false);
223+
espi_ite_ec_enable_pad_ctrl(ESPI_ITE_SOC_DEV, false);
224224
#endif
225225
/* Run change PLL sequence */
226226
chip_run_pll_sequence(pll);
227227
#ifdef CONFIG_ESPI
228228
/* Enable eSPI pad after changing PLL sequence */
229-
espi_it8xxx2_enable_pad_ctrl(ESPI_IT8XXX2_SOC_DEV, true);
229+
espi_ite_ec_enable_pad_ctrl(ESPI_ITE_SOC_DEV, true);
230230
#endif
231231
}
232232
}
@@ -307,7 +307,7 @@ void riscv_idle(enum chip_pll_mode mode, unsigned int key)
307307
* interrupt to restore clocks. With this interrupt, EC will not defer
308308
* eSPI bus while transaction is accepted.
309309
*/
310-
espi_it8xxx2_enable_trans_irq(ESPI_IT8XXX2_SOC_DEV, true);
310+
espi_ite_ec_enable_trans_irq(ESPI_ITE_SOC_DEV, true);
311311
#endif
312312
/* Chip doze after wfi instruction */
313313
chip_pll_ctrl(mode);
@@ -335,7 +335,7 @@ void riscv_idle(enum chip_pll_mode mode, unsigned int key)
335335

336336
#ifdef CONFIG_ESPI
337337
/* CPU has been woken up, the interrupt is no longer needed */
338-
espi_it8xxx2_enable_trans_irq(ESPI_IT8XXX2_SOC_DEV, false);
338+
espi_ite_ec_enable_trans_irq(ESPI_ITE_SOC_DEV, false);
339339
#endif
340340
/*
341341
* Enable M-mode external interrupt

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