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Henri Xaviercarlescufi
Henri Xavier
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boards: Add support for Khadas Edge-V board
This is an AArch64 board. We also add RK3399 SoC support, as well as a very simple Synopsys 8250dw UART driver. Signed-off-by: Henri Xavier <datacomos@huawei.com>
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‎boards/arm64/khadas_edgev/CMakeLists.txt

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# SPDX-License-Identifier: Apache-2.0

‎boards/arm64/khadas_edgev/Kconfig.board

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#
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# Copyright 2022 Huawei France Technologies SASU
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_KHADAS_EDGEV
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bool "Khadas Edge-V"
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depends on SOC_SERIES_RK3399

‎boards/arm64/khadas_edgev/Kconfig.defconfig

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#
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# Copyright 2022 Huawei France Technologies SASU
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD
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default "khadas_edgev"
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depends on BOARD_KHADAS_EDGEV

‎boards/arm64/khadas_edgev/board.cmake

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# SPDX-License-Identifier: Apache-2.0

‎boards/arm64/khadas_edgev/doc/index.rst

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.. _khadas_edgev:
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Khadas Edge-V
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#################################
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Overview
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********
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See <https://www.khadas.com/edge-v>
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Hardware
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********
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See <https://docs.khadas.com/linux/edge/Hardware.html#Edge-V-1>
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Supported Features
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==================
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Khadas Edge-V board default configuration supports the following
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hardware features:
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+-----------+------------+--------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+======================================+
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| GIC-500 | on-chip | GICv3 interrupt controller |
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+-----------+------------+--------------------------------------+
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| ARM TIMER | on-chip | System Clock |
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+-----------+------------+--------------------------------------+
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| UART | on-chip | Synopsys DesignWare 8250 serial port |
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+-----------+------------+--------------------------------------+
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Other hardware features have not been enabled yet for this board.
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The default configuration can be found in the defconfig file for NON-SMP:
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``boards/arm64/khadas_edgev/khadas_edgev_defconfig``
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There are multiple serial ports on the board: Zephyr is using
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uart2 as serial console.
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Programming and Debugging
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*************************
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Use the following configuration to run basic Zephyr applications and
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kernel tests on Khadas Edge-V board. For example, with the :ref:`hello_world`:
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1. Non-SMP mode
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:host-os: unix
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:board: khadas_edgev
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:goals: build
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This will build an image with the synchronization sample app.
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Build the zephyr image:
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.. code-block:: console
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mkimage -C none -A arm64 -O linux -a 0x10000000 -e 0x10000000 -d build/zephyr/zephyr.bin build/zephyr/zephyr.img
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Use u-boot to load and kick Zephyr.bin to CPU Core0:
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.. code-block:: console
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tftpboot ${pxefile_addr_r} zephyr.img; bootm start ${pxefile_addr_r}; bootm loados; bootm go
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It will display the following console output:
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.. code-block:: console
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*** Booting Zephyr OS build XXXXXXXXXXXX ***
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Hello World! khadas_edgev
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Flashing
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========
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Zephyr image can be loaded in DDR memory at address 0x10000000 from SD Card,
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EMMC, QSPI Flash or downloaded from network in uboot.
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References
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==========
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`Documentation: <https://docs.khadas.com/linux/edge/>`_

‎boards/arm64/khadas_edgev/khadas_edgev.dts

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/*
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* Copyright 2022 Huawei France Technologies SASU
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <rockchip/rk3399.dtsi>
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/ {
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model = "Khadas Edge-V";
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compatible = "khadas,edgev";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart2;
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zephyr,shell-uart = &uart2;
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};
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cpus {
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/delete-node/ cpu@1;
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/delete-node/ cpu@2;
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/delete-node/ cpu@3;
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/delete-node/ cpu@4;
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/delete-node/ cpu@5;
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};
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};
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&uart2 {
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status = "okay";
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};

‎boards/arm64/khadas_edgev/khadas_edgev.yaml

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identifier: khadas_edgev
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name: Khadas Edge-V (single core, non SMP)
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 8192

‎boards/arm64/khadas_edgev/khadas_edgev_defconfig

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# SPDX-License-Identifier: Apache-2.0
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# Platform Configuration
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CONFIG_SOC_SERIES_RK3399=y
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CONFIG_SOC_RK3399=y
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CONFIG_BOARD_KHADAS_EDGEV=y
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CONFIG_ARM64_VA_BITS_40=y
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CONFIG_ARM64_PA_BITS_40=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=24000000
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_ARMV8_A_NS=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y

‎dts/arm64/rockchip/rk3399.dtsi

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/*
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* Copyright 2022 Huawei France Technologies SASU
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm64/armv8-a.dtsi>
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#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
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#include <mem.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x3>;
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};
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cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0 0x100>;
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};
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cpu@5 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0 0x101>;
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};
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};
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gic: interrupt-controller@fee00000 {
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#address-cells = <1>;
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compatible = "arm,gic";
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reg = <0xfee00000 0x10000>, /* GICD */
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<0xfef00000 0xc0000>, /* GICR */
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<0xfff00000 0x10000>, /* GICC */
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<0xfff10000 0x10000>, /* GICH */
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<0xfff20000 0x10000>; /* GICV */
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interrupt-controller;
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#interrupt-cells = <4>;
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status = "okay";
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};
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psci: psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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sram0: memory@10000000 {
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reg = <0x10000000 DT_SIZE_M(128)>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>;
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};
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uart2: serial@ff1a0000 {
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compatible = "rockchip,rk3399-uart", "ns16550";
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reg = <0xff1a0000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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status = "disabled";
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reg-shift = <2>;
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clock-frequency = <350000000>;
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};
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};

‎soc/arm64/rockchip/CMakeLists.txt

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#
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# Copyright 2022 Huawei France Technologies SASU
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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add_subdirectory(${SOC_SERIES})

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