boards: amd: versal2_rpu: Update configuration to align with latest target definitions

In 2025.1 xsdb release for Versal Gen 2 platform target definitions got changed,
Updated config file to align with latest target definitions.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>

Author: Appana Durga Kedareswara rao

boards/amd/versal2_rpu/support/xsdb.cfg

@@ -3,27 +3,27 @@
 # SPDX-License-Identifier: Apache-2.0
 
 proc rpu0_core0_rst { {mem "default"} } {
-	targets -set -filter {name =~ "DAP*"}
-	#CRL write protect
-	mwr -force 0xeb5e001c 0x0
-	mwr -force 0xEB580000 1
+	targets -set -filter {name =~ "Versal Gen 2*"}
+	# CRL write protect
+	mwr -force 0xeb5e001c 0
+	mwr -force 0xeb580000 1
 	mwr -force 0xbbf20000 0xeafffffe
 	# write BASE_HI and BASE_LO
-        if {$mem eq "ddr"} {
-            set addr 0x100000
-        } elseif {$mem eq "tcm"} {
-            set addr 0x0
-        } elseif {$mem eq "default"} {
-            set addr 0xbbf20000
-        }
-	mwr -force 0xEB588008 $addr
+	if {$mem eq "ddr"} {
+		set addr 0x100000
+	} elseif {$mem eq "tcm"} {
+		set addr 0
+	} elseif {$mem eq "default"} {
+		set addr 0xbbf20000
+	}
+	mwr -force 0xeb588008 $addr
 	# write TCMBOOT as one
-	mask_write 0xEB588000 0x10 0x10
+	mask_write 0xeb588000 0x10 0x10
 	# reset CORE0A_RESET out of reset A_TOPRESET and CORE0A_POR
-	mask_write 0xEB5E0310 0x10101 0x1
+	mask_write 0xeb5e0310 0x10101 0x1
 	# out of reset CORE0A_RESET
-	mask_write 0xEB5E0310 0x1 0x0
-	targets -set -filter {name =~ "Cortex-R52*0" && parent =~ "*0x00100000"}
+	mask_write 0xeb5e0310 0x1 0
+	targets -set -filter {name =~ "Cortex-R52*0.0"}
 	after 300
 	stop
 	after 1000
@@ -58,7 +58,7 @@ proc load_image args  {
 		ta
 	}
 	after 1000
-	targets -set -nocase -filter {name =~ "DAP*"}
+	targets -set -filter {name =~ "Versal Gen 2*"}
 	after 100
 	# Configure timestamp generator to run global timer gracefully
 	# Ideally these registers should be set from bootloader (cdo)