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sensor: adxl345: Optimize RTIO SQE/CQE pool based on fifo-watermark
Since it's directly related (we can't just burst-read the fifo at once). This patch includes a comment block explaining this rationale. Signed-off-by: Luis Ubieda <luisf@croxel.com>
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drivers/sensor/adi/adxl345/adxl345.c

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -537,12 +537,12 @@ static int adxl345_init(const struct device *dev)
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(I2C_DT_IODEV_DEFINE(adxl345_iodev_##inst, DT_DRV_INST(inst));), \
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())
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/* Conditionally set the RTIO size based on the presence of SPI/I2C
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* lines 541 - 542.
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* The sizes of sqe and cqe pools are increased due to the amount of
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* multibyte reads needed for watermark using 31 samples
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* (adx345_stram - line 203), using smaller amounts of samples
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* to trigger an interrupt can decrease the pool sizes.
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/** RTIO SQE/CQE pool size depends on the fifo-watermark because we
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* can't just burst-read all the fifo data at once. Datasheet specifies
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* we need to get one frame at a time (through the Data registers),
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* therefore, we set all the sequence at once to properly pull each
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* frame, and then end up calling the completion event so the
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* application receives it).
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*/
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#define ADXL345_RTIO_DEFINE(inst) \
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/* Conditionally include SPI and/or I2C parts based on their presence */ \
@@ -552,10 +552,9 @@ static int adxl345_init(const struct device *dev)
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COND_CODE_1(DT_INST_ON_BUS(inst, i2c), \
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(ADXL345_RTIO_I2C_DEFINE(inst)), \
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()) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, spi_dt_spec) && \
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DT_INST_NODE_HAS_PROP(inst, i2c_dt_spec), \
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(RTIO_DEFINE(adxl345_rtio_ctx_##inst, 128, 128);), \
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(RTIO_DEFINE(adxl345_rtio_ctx_##inst, 64, 64);)) \
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RTIO_DEFINE(adxl345_rtio_ctx_##inst, \
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2 * DT_INST_PROP(inst, fifo_watermark) + 2, \
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2 * DT_INST_PROP(inst, fifo_watermark) + 2);
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#define ADXL345_CONFIG(inst) \
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.odr = DT_INST_PROP(inst, odr), \

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