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10 | 10 | #include <zephyr/dt-bindings/gpio/gpio.h>
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11 | 11 | #include <zephyr/dt-bindings/clock/stm32mp2_clock.h>
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12 | 12 | #include <zephyr/dt-bindings/reset/stm32mp2_reset.h>
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| 13 | +#include <zephyr/dt-bindings/i2c/i2c.h> |
13 | 14 |
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14 | 15 | / {
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15 | 16 | cpus {
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240 | 241 | interrupts = <150 0>;
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241 | 242 | status = "disabled";
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242 | 243 | };
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| 244 | + |
| 245 | + i2c1: i2c@40120000 { |
| 246 | + compatible = "st,stm32-i2c-v2"; |
| 247 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 248 | + reg = <0x40120000 DT_SIZE_K(1)>; |
| 249 | + #address-cells = <1>; |
| 250 | + #size-cells = <0>; |
| 251 | + clocks = <&rcc STM32_CLOCK(I2C1, STM32_CLK)>; |
| 252 | + interrupts = <108 0>; |
| 253 | + interrupt-names = "combined"; |
| 254 | + status = "disabled"; |
| 255 | + }; |
| 256 | + |
| 257 | + i2c2: i2c@40130000 { |
| 258 | + compatible = "st,stm32-i2c-v2"; |
| 259 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 260 | + reg = <0x40130000 DT_SIZE_K(1)>; |
| 261 | + #address-cells = <1>; |
| 262 | + #size-cells = <0>; |
| 263 | + clocks = <&rcc STM32_CLOCK(I2C2, STM32_CLK)>; |
| 264 | + interrupts = <110 0>; |
| 265 | + interrupt-names = "combined"; |
| 266 | + status = "disabled"; |
| 267 | + }; |
| 268 | + |
| 269 | + i2c3: i2c@40140000 { |
| 270 | + compatible = "st,stm32-i2c-v2"; |
| 271 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 272 | + reg = <0x40140000 DT_SIZE_K(1)>; |
| 273 | + #address-cells = <1>; |
| 274 | + #size-cells = <0>; |
| 275 | + clocks = <&rcc STM32_CLOCK(I2C3, STM32_CLK)>; |
| 276 | + interrupts = <137 0>; |
| 277 | + interrupt-names = "combined"; |
| 278 | + status = "disabled"; |
| 279 | + }; |
| 280 | + |
| 281 | + i2c4: i2c@40150000 { |
| 282 | + compatible = "st,stm32-i2c-v2"; |
| 283 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 284 | + reg = <0x40150000 DT_SIZE_K(1)>; |
| 285 | + #address-cells = <1>; |
| 286 | + #size-cells = <0>; |
| 287 | + clocks = <&rcc STM32_CLOCK(I2C4, STM32_CLK)>; |
| 288 | + interrupts = <168 0>; |
| 289 | + interrupt-names = "combined"; |
| 290 | + status = "disabled"; |
| 291 | + }; |
| 292 | + |
| 293 | + i2c5: i2c@40160000 { |
| 294 | + compatible = "st,stm32-i2c-v2"; |
| 295 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 296 | + reg = <0x40160000 DT_SIZE_K(1)>; |
| 297 | + #address-cells = <1>; |
| 298 | + #size-cells = <0>; |
| 299 | + clocks = <&rcc STM32_CLOCK(I2C5, STM32_CLK)>; |
| 300 | + interrupts = <181 0>; |
| 301 | + interrupt-names = "combined"; |
| 302 | + status = "disabled"; |
| 303 | + }; |
| 304 | + |
| 305 | + i2c6: i2c@40170000 { |
| 306 | + compatible = "st,stm32-i2c-v2"; |
| 307 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 308 | + reg = <0x40170000 DT_SIZE_K(1)>; |
| 309 | + #address-cells = <1>; |
| 310 | + #size-cells = <0>; |
| 311 | + clocks = <&rcc STM32_CLOCK(I2C6, STM32_CLK)>; |
| 312 | + interrupts = <208 0>; |
| 313 | + interrupt-names = "combined"; |
| 314 | + status = "disabled"; |
| 315 | + }; |
| 316 | + |
| 317 | + i2c7: i2c@40180000 { |
| 318 | + compatible = "st,stm32-i2c-v2"; |
| 319 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 320 | + reg = <0x40180000 DT_SIZE_K(1)>; |
| 321 | + #address-cells = <1>; |
| 322 | + #size-cells = <0>; |
| 323 | + clocks = <&rcc STM32_CLOCK(I2C7, STM32_CLK)>; |
| 324 | + interrupts = <210 0>; |
| 325 | + interrupt-names = "combined"; |
| 326 | + status = "disabled"; |
| 327 | + }; |
243 | 328 | };
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244 | 329 | };
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245 | 330 |
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