boards: fix ram size

fix ram size to be aligned with soc, fix some file layouts

Signed-off-by: SoftwareArchitekt <info@andocs.biz>

Author: SoftwareArchitekt

boards/scdz/ch32v307evt/ch32v307evt-pinctrl.dtsi

@@ -13,10 +13,11 @@
 			drive-push-pull;
 			slew-rate = "max-speed-10mhz";
 		};
+
 		group2 {
 			pinmux = <USART1_RX_PA10_0>;
 			bias-pull-up;
 		};
 	};
 
-};
+};

boards/scdz/ch32v307evt/ch32v307evt.dts

@@ -37,11 +37,10 @@
 	};
 	buttons {
 		compatible = "gpio-keys";
-
 		user_button0: sw0 {
-            label = "User SW0";
-			gpios = <&gpioa 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
-			zephyr,code = <INPUT_KEY_0>;
+                label = "User SW0";
+		gpios = <&gpioa 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+		zephyr,code = <INPUT_KEY_0>;
 		};
 	};
 

boards/scdz/ch32v307evt/ch32v307evt.yaml

@@ -5,7 +5,7 @@ arch: riscv
 toolchain:
   - cross-compile
   - zephyr
-ram: 64
+ram: 32
 flash: 256
 supported:
   - gpio