drivers: pinctrl: wch_20x_30x_afio: fix afio remap

Enable the AFIO clock before remap. Otherwise, remap will not work.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>

Author: recalci

drivers/pinctrl/pinctrl_wch_20x_30x_afio.c

@@ -30,9 +30,17 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
 		uint8_t pcfr_id = FIELD_GET(CH32V20X_V30X_PINCTRL_PCFR_ID_MASK, pins->config);
 		uint8_t remap = FIELD_GET(CH32V20X_V30X_PINCTRL_RM_MASK, pins->config);
 		GPIO_TypeDef *regs = wch_afio_pinctrl_regs[port];
-		uint32_t pcfr = pcfr_id == 0 ? AFIO->PCFR1 : AFIO->PCFR2;
+		uint32_t pcfr = 0;
 		uint8_t cfg = 0;
 
+		if (RCC->APB2PCENR & RCC_AFIOEN) {
+			pcfr = pcfr_id == 0 ? AFIO->PCFR1 : AFIO->PCFR2;
+		} else {
+			if (remap != 0) {
+				RCC->APB2PCENR |= RCC_AFIOEN;
+			}
+		}
+
 		if (pins->output_high || pins->output_low) {
 			cfg |= (pins->slew_rate + 1);
 			if (pins->drive_open_drain) {

drivers/pinctrl/pinctrl_wch_afio.c

@@ -25,11 +25,15 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
 		uint8_t bit0 = (pins->config >> CH32V003_PINCTRL_RM_BASE_SHIFT) & 0x1F;
 		uint8_t remap = (pins->config >> CH32V003_PINCTRL_RM_SHIFT) & 0x3;
 		GPIO_TypeDef *regs = wch_afio_pinctrl_regs[port];
-		uint32_t pcfr1 = AFIO->PCFR1;
+		uint32_t pcfr1 = 0;
 		uint8_t cfg = 0;
 
-		if (remap != 0) {
-			RCC->APB2PCENR |= RCC_AFIOEN;
+		if (RCC->APB2PCENR & RCC_AFIOEN) {
+			pcfr1 = AFIO->PCFR1;
+		} else {
+			if (remap != 0) {
+				RCC->APB2PCENR |= RCC_AFIOEN;
+			}
 		}
 
 		if (pins->output_high || pins->output_low) {