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dts: boards: we: add board Ophelia-IV
add new board Ophelia-IV Signed-off-by: Matthias Hauser <matthias.hauser@we-online.de>
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# Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_OPHELIA4EV_NRF54L15_CPUAPP
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config ROM_START_OFFSET
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default 0x800 if BOOTLOADER_MCUBOOT
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endif # BOARD_OPHELIA4EV_NRF54L15_CPUAPP
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# Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_OPHELIA4EV
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select SOC_NRF54L15_CPUAPP if BOARD_OPHELIA4EV_NRF54L15_CPUAPP
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select SOC_NRF54L15_CPUFLPR if BOARD_OPHELIA4EV_NRF54L15_CPUFLPR

boards/we/ophelia4ev/board.cmake

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# Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
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# SPDX-License-Identifier: Apache-2.0
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include(${ZEPHYR_BASE}/boards/nordic/nrf54l15dk/board.cmake)

boards/we/ophelia4ev/board.yml

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board:
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name: ophelia4ev
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full_name: Ophelia-IV DK
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vendor: we
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socs:
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- name: nrf54l15
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variants:
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- name: xip
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cpucluster: cpuflpr
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boards/we/ophelia4ev/doc/index.rst

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.. zephyr:board:: ophelia4ev
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Overview
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********
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.. note::
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You can find more information about the nRF54L15 SoC on the `nRF54L15 website`_.
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For the nRF54L15 technical documentation and other resources (such as
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SoC Datasheet), see the `nRF54L15 documentation`_ page.
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The OPHELIA-IV EV board is an evaluation board of the Ophelia-IV radio module.
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Hardware
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********
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The Ophelia-IV uses the internal low frequency RC oscillator
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and provides the so called smart antenna connection, that allows
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to choose between the module's integrated PCB antenna and an external
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antenna that can be connected to the available SMA connector.
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Supported Features
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==================
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.. zephyr:board-supported-hw::
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Programming and Debugging
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*************************
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Applications for the ``ophelia4ev/nrf54l15/cpuapp`` board target can be
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built, flashed, and debugged in the usual way. See
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:ref:`build_an_application` and :ref:`application_run` for more details on
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building and running.
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Applications for the ``ophelia4ev/nrf54l15/cpuflpr`` board target need
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to be built using sysbuild to include the ``vpr_launcher`` image for the application core.
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Enter the following command to compile ``hello_world`` for the FLPR core:
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.. code-block:: console
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west build -p -b ophelia4ev/nrf54l15/cpuflpr --sysbuild
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Flashing
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========
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As an example, this section shows how to build and flash the :zephyr:code-sample:`hello_world`
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application.
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To build and program the sample to the OPHELIA-IV EV, complete the following steps:
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First, connect the OPHELIA-IV EV to you computer using the USB port on the board.
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Then connect a segger flasher to the SWD connector available on the board.
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Next, build the sample by running the following command:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: ophelia4ev/nrf54l15/cpuapp
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:goals: build flash
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.. warning::
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When programming the device, you might get an error similar to the following message::
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ERROR: The operation attempted is unavailable due to readback protection in
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ERROR: your device. Please use --recover to unlock the device.
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This error occurs when readback protection is enabled.
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To disable the readback protection, you must *recover* your device.
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Enter the following command to recover the core::
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west flash --recover
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The ``--recover`` command erases the flash memory and then writes a small binary into
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the recovered flash memory.
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This binary prevents the readback protection from enabling itself again after a pin
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reset or power cycle.
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Follow the instructions in the :ref:`nordic_segger` page to install
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and configure all the necessary software. Further information can be
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found in :ref:`nordic_segger_flashing`.
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References
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**********
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.. target-notes::
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.. _nRF54L15 website: https://www.nordicsemi.com/Products/nRF54L15
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.. _nRF54L15 documentation: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf54l/index.html
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/*
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* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "ophelia4ev_nrf54l15-pinctrl.dtsi"
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/ {
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leds {
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compatible = "gpio-leds";
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led0: led_0 {
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gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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label = "Green LED 0";
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};
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led1: led_1 {
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gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
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label = "Green LED 1";
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};
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led2: led_2 {
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gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
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label = "Green LED 2";
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};
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led3: led_3 {
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gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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label = "Green LED 3";
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};
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};
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pwmleds {
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compatible = "pwm-leds";
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/*
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* PWM signal can be exposed on GPIO pin only within same domain.
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* There is only one domain which contains both PWM and GPIO:
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* PWM20/21/22 and GPIO Port P1.
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* Only LEDs connected to P1 can work with PWM, for example LED3.
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*/
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pwm_led3: pwm_led_3 {
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pwms = <&pwm20 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
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};
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};
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buttons {
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compatible = "gpio-keys";
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button0: button_0 {
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gpios = <&gpio2 3 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 0";
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zephyr,code = <INPUT_KEY_0>;
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};
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button1: button_1 {
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gpios = <&gpio1 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 1";
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zephyr,code = <INPUT_KEY_1>;
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};
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button2: button_2 {
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gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 2";
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zephyr,code = <INPUT_KEY_2>;
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};
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button3: button_3 {
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gpios = <&gpio1 14 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
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label = "Push button 3";
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zephyr,code = <INPUT_KEY_3>;
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};
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};
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aliases {
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led0 = &led0;
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led1 = &led1;
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led2 = &led2;
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led3 = &led3;
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pwm-led0 = &pwm_led3;
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sw0 = &button0;
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sw1 = &button1;
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sw2 = &button2;
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sw3 = &button3;
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watchdog0 = &wdt31;
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};
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};
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&uart20 {
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current-speed = <115200>;
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pinctrl-0 = <&uart20_default>;
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pinctrl-1 = <&uart20_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&uart30 {
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current-speed = <115200>;
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pinctrl-0 = <&uart30_default>;
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pinctrl-1 = <&uart30_sleep>;
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pinctrl-names = "default", "sleep";
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};
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&pwm20 {
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status = "okay";
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pinctrl-0 = <&pwm20_default>;
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pinctrl-1 = <&pwm20_sleep>;
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pinctrl-names = "default", "sleep";
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};
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/* Get a node label for wi-fi spi to use in shield files */
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wifi_spi: &spi22 {};
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/*
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* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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/omit-if-no-ref/ uart20_default: uart20_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 4)>,
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<NRF_PSEL(UART_RTS, 1, 6)>;
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 1, 15)>,
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<NRF_PSEL(UART_CTS, 1, 2)>;
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bias-pull-up;
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};
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};
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/omit-if-no-ref/ uart20_sleep: uart20_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 4)>,
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<NRF_PSEL(UART_RX, 1, 15)>,
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<NRF_PSEL(UART_RTS, 1, 6)>,
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<NRF_PSEL(UART_CTS, 1, 2)>;
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low-power-enable;
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};
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};
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/omit-if-no-ref/ uart30_default: uart30_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 2, 8)>,
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<NRF_PSEL(UART_RTS, 2, 10)>;
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 2, 7)>,
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<NRF_PSEL(UART_CTS, 2, 9)>;
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bias-pull-up;
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};
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};
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/omit-if-no-ref/ uart30_sleep: uart30_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 2, 8)>,
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<NRF_PSEL(UART_RX, 2, 7)>,
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<NRF_PSEL(UART_RTS, 2, 10)>,
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<NRF_PSEL(UART_CTS, 2, 9)>;
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low-power-enable;
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};
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};
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/omit-if-no-ref/ spi00_default: spi00_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
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<NRF_PSEL(SPIM_MOSI, 2, 2)>,
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<NRF_PSEL(SPIM_MISO, 2, 4)>;
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};
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};
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/omit-if-no-ref/ spi00_sleep: spi00_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
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<NRF_PSEL(SPIM_MOSI, 2, 2)>,
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<NRF_PSEL(SPIM_MISO, 2, 4)>;
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low-power-enable;
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};
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};
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/omit-if-no-ref/ pwm20_default: pwm20_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 10)>;
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};
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};
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/omit-if-no-ref/ pwm20_sleep: pwm20_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 1, 10)>;
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low-power-enable;
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};
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};
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/omit-if-no-ref/ grtc_default: grtc_default {
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group1 {
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psels = <NRF_PSEL(GRTC_CLKOUT_FAST, 1, 8)>,
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<NRF_PSEL(GRTC_CLKOUT_32K, 0, 4)>;
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};
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};
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/omit-if-no-ref/ grtc_sleep: grtc_sleep {
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group1 {
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psels = <NRF_PSEL(GRTC_CLKOUT_FAST, 1, 8)>,
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<NRF_PSEL(GRTC_CLKOUT_32K, 0, 4)>;
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low-power-enable;
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};
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};
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};

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