@@ -20,6 +20,13 @@ LOG_MODULE_REGISTER(i2c_mchp, CONFIG_I2C_LOG_LEVEL);
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#define DT_DRV_COMPAT microchip_mpfs_i2c
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+ /* Is MSS I2C module 'resets' line property defined */
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+ #define MSS_I2C_RESET_ENABLED DT_ANY_INST_HAS_PROP_STATUS_OKAY(resets)
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+
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+ #if MSS_I2C_RESET_ENABLED
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+ #include <zephyr/drivers/reset.h>
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+ #endif
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+
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#define CORE_I2C_CTRL (0x00)
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#define CORE_I2C_STATUS (0x04)
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#define CORE_I2C_DATA (0x08)
@@ -94,6 +101,9 @@ struct mss_i2c_config {
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uint32_t clock_freq ;
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uintptr_t i2c_base_addr ;
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uint32_t i2c_irq_base ;
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+ #if MSS_I2C_RESET_ENABLED
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+ struct reset_dt_spec reset_spec ;
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+ #endif
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};
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struct mss_i2c_data {
@@ -243,6 +253,13 @@ static DEVICE_API(i2c, mss_i2c_driver_api) = {
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static void mss_i2c_reset (const struct device * dev )
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{
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const struct mss_i2c_config * cfg = dev -> config ;
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+
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+ #if MSS_I2C_RESET_ENABLED
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+ if (cfg -> reset_spec .dev != NULL ) {
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+ (void )reset_line_deassert_dt (& cfg -> reset_spec );
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+ }
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+ #endif
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+
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uint8_t ctrl = sys_read8 (cfg -> i2c_base_addr + CORE_I2C_CTRL );
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sys_write8 ((ctrl & ~CTRL_ENS1 ), cfg -> i2c_base_addr + CORE_I2C_CTRL );
@@ -380,6 +397,8 @@ static void mss_i2c_irq_handler(const struct device *dev)
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.i2c_base_addr = DT_INST_REG_ADDR(n), \
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.i2c_irq_base = DT_INST_IRQN(n), \
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.clock_freq = DT_INST_PROP(n, clock_frequency), \
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+ IF_ENABLED(DT_INST_NODE_HAS_PROP(n, resets), \
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+ (.reset_spec = RESET_DT_SPEC_INST_GET(n),)) \
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}; \
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\
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I2C_DEVICE_DT_INST_DEFINE(n, mss_i2c_init_##n, NULL, &mss_i2c_data_##n, \
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