Skip to content

Commit 8c46895

Browse files
JiafeiPannashif
authored andcommitted
boards: imx943_evk: add i.MX 943 EVK board support for A55
The IMX943 EVK board is a design and evaluation platform based on the NXP i.MX 943 processor. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
1 parent d47b473 commit 8c46895

File tree

8 files changed

+259
-0
lines changed

8 files changed

+259
-0
lines changed
Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright 2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config INTC_INIT_PRIORITY
5+
default 2
6+
7+
config MBOX_INIT_PRIORITY
8+
default 3
Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
# Copyright 2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config BOARD_IMX943_EVK
5+
select SOC_MIMX94398_A55 if BOARD_IMX943_EVK_MIMX94398_A55
6+
select SOC_PART_NUMBER_MIMX94398AVKM

boards/nxp/imx943_evk/board.yml

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: imx943_evk
3+
full_name: i.MX943 EVK
4+
vendor: nxp
5+
socs:
6+
- name: mimx94398

boards/nxp/imx943_evk/doc/index.rst

Lines changed: 124 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,124 @@
1+
.. zephyr:board:: imx943_evk
2+
3+
Overview
4+
********
5+
6+
The IMX943LP5EVK-19 board is a design and evaluation platform based on the
7+
NXP i.MX 943 processor. The i.MX 943 processor integrates up to four Arm
8+
Cortex-A55 cores, along with two Arm Cortex-M33 cores and two Arm Cortex-M7
9+
cores for functional safety. With PLCs, I/O controllers, V2X accelerators,
10+
ML acceleration, energy management, and advanced security, the i.MX 943
11+
processor provides optimized performance and power efficiency for industrial,
12+
IoT, and automotive devices. The i.MX943 device on the board comes in a
13+
compact 19 x 19 mm package.
14+
15+
Hardware
16+
********
17+
18+
- i.MX 943 automotive applications processor
19+
20+
- The processor integrates up to four Arm Cortex-A55 cores, and supports
21+
functional safety with built-in Arm Cortex-M33 and -M7 cores
22+
23+
- DRAM memory: 8-Gbit LPDDR5 DRAM
24+
- XSPI interface: 64 MB octal SPI NOR flash memory
25+
- eMMC: 32 GB eMMC NAND flash memory
26+
- uSDHC interface: an SD card slot
27+
- USB interface: Two USB Type-C ports
28+
- Ethernet interface: seven Ethernet ports
29+
- PCIe interface: one M.2 slot and one PCIe x4 slot.
30+
- FlexCAN interface: four CAN controller with four CAN connector.
31+
- LPUART interface
32+
- LPSPI interface
33+
- LPI2C interface
34+
- SAI interface
35+
- MQS interface
36+
- MICFIL interface
37+
- LVDS interface
38+
- ADC interface
39+
- SINC interface
40+
- Debug interface
41+
- One USB-to-UART/MPSSE device, FT4232H
42+
- One USB 3.2 Type-C connector (J15) for FT4232H provides quad serial ports
43+
- JTAG header J16
44+
45+
Supported Features
46+
==================
47+
48+
.. zephyr:board-supported-hw::
49+
50+
System Clock
51+
------------
52+
53+
This board configuration uses a system clock frequency of 24 MHz for Cortex-A55.
54+
Cortex-A55 Core runs up to 1.7 GHz.
55+
56+
Serial Port
57+
-----------
58+
59+
This board configuration uses a single serial communication channel with the
60+
CPU's UART1 for Cortex-A55.
61+
62+
Programming and Debugging (A55)
63+
*******************************
64+
65+
.. zephyr:board-supported-runners::
66+
67+
Boot Zephyr by Using U-Boot Command
68+
===================================
69+
70+
U-Boot "go" command can be used to start Zephyr on A55 Core0.
71+
72+
Dependency
73+
----------
74+
75+
Need to disable all watchdog in U-Boot, otherwise, watchdog will reset the board
76+
after Zephyr start up from the same A55 Core.
77+
78+
Step 1: Build Zephyr application
79+
--------------------------------
80+
81+
Here is an example for the :zephyr:code-sample:`hello_world` application.
82+
83+
.. zephyr-app-commands::
84+
:zephyr-app: samples/hello_world
85+
:host-os: unix
86+
:board: imx943_evk/mimx94398/a55
87+
:goals: build
88+
89+
Step 2: Download Zephyr Image into DDR Memory
90+
---------------------------------------------
91+
92+
Firstly need to download Zephyr binary image into DDR memory, it can use tftp:
93+
94+
.. code-block:: console
95+
96+
tftp 0xd0000000 zephyr.bin
97+
98+
Or copy the Zephyr image ``zephyr.bin`` SD card and plug the card into the board, for example
99+
if copy to the FAT partition of the SD card, use the following U-Boot command to load the image
100+
into DDR memory (assuming the SD card is dev 1, fat partition ID is 1, they could be changed
101+
based on actual setup):
102+
103+
.. code-block:: console
104+
105+
fatload mmc 1:1 0xd0000000 zephyr.bin;
106+
107+
Step 3: Boot Zephyr
108+
-------------------
109+
110+
Use the following command to boot Zephyr on the core0:
111+
112+
.. code-block:: console
113+
114+
dcache off; icache flush; go 0xd0000000;
115+
116+
Then the following log could be found on UART1 console:
117+
118+
.. code-block:: console
119+
120+
*** Booting Zephyr OS build v4.1.0-3650-gdb71736adb68 ***
121+
Hello World! imx943_evk/mimx94398/a55
122+
123+
.. include:: ../../common/board-footer.rst
124+
:start-after: nxp-board-footer
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
/*
2+
* Copyright 2025 NXP
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
#include <nxp/nxp_imx/mimx94398avkm-pinctrl.dtsi>
7+
8+
&pinctrl {
9+
lpuart1_default: lpuart1_default {
10+
group0 {
11+
pinmux = <&iomuxc_uart1_rxd_lpuart_rx_lpuart1_rx>,
12+
<&iomuxc_uart1_txd_lpuart_tx_lpuart1_tx>;
13+
bias-pull-up;
14+
slew-rate = "slightly_fast";
15+
drive-strength = "x4";
16+
};
17+
};
18+
};
Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
/*
2+
* Copyright 2025 NXP
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
9+
#include <nxp/nxp_mimx943_a55.dtsi>
10+
#include "imx943_evk-pinctrl.dtsi"
11+
12+
/ {
13+
model = "NXP i.MX943 A55";
14+
compatible = "fsl,mimx943";
15+
16+
chosen {
17+
zephyr,console = &lpuart1;
18+
zephyr,shell-uart = &lpuart1;
19+
/* sram node actually locates at DDR DRAM */
20+
zephyr,sram = &dram;
21+
};
22+
23+
cpus {
24+
cpu@0 {
25+
status = "disabled";
26+
};
27+
28+
cpu@100 {
29+
status = "disabled";
30+
};
31+
32+
cpu@200 {
33+
status = "disabled";
34+
};
35+
};
36+
37+
dram: memory@d0000000 {
38+
reg = <0xd0000000 DT_SIZE_M(1)>;
39+
};
40+
};
41+
42+
&lpuart1 {
43+
status = "okay";
44+
current-speed = <115200>;
45+
pinctrl-0 = <&lpuart1_default>;
46+
pinctrl-names = "default";
47+
};
Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
#
2+
# Copyright 2025 NXP
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
#
6+
7+
identifier: imx943_evk/mimx94398/a55
8+
name: NXP i.MX943 EVK A55
9+
type: mcu
10+
arch: arm64
11+
toolchain:
12+
- zephyr
13+
- cross-compile
14+
ram: 1024
15+
supported:
16+
- uart
17+
vendor: nxp
Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,33 @@
1+
#
2+
# Copyright 2025 NXP
3+
#
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
# ARM Options
7+
CONFIG_AARCH64_IMAGE_HEADER=y
8+
CONFIG_ARMV8_A_NS=y
9+
10+
# MMU Options
11+
CONFIG_MAX_XLAT_TABLES=24
12+
13+
# Cache Options
14+
CONFIG_CACHE_MANAGEMENT=y
15+
CONFIG_DCACHE_LINE_SIZE_DETECT=y
16+
CONFIG_ICACHE_LINE_SIZE_DETECT=y
17+
18+
# Zephyr Kernel Configuration
19+
CONFIG_XIP=n
20+
CONFIG_KERNEL_DIRECT_MAP=y
21+
22+
# Serial Drivers
23+
CONFIG_SERIAL=y
24+
CONFIG_UART_INTERRUPT_DRIVEN=y
25+
26+
# Enable Console
27+
CONFIG_CONSOLE=y
28+
CONFIG_UART_CONSOLE=y
29+
30+
CONFIG_CLOCK_CONTROL=y
31+
32+
CONFIG_MBOX=y
33+
CONFIG_ARM_SCMI=y

0 commit comments

Comments
 (0)