spi_nxp_lpspi: Support API timing parameters

Support the new timing parameters in the API. We don't really need to
check if the cs_control is GPIO because the pin function already
determines that behavior.

Also, if both the DT and the API is unset, introduce a new default
behavior which is to make the transfer delay 50% of the SCK period. This
is what is most commonly expected by users and often gets reported as a
bug because they don't configure this.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>

Author: decsny

drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_common.c

@@ -108,9 +108,20 @@ int spi_mcux_configure(const struct device *dev, const struct spi_config *spi_cf
 	master_config.direction =
 		(spi_cfg->operation & SPI_TRANSFER_LSB) ? kLPSPI_LsbFirst : kLPSPI_MsbFirst;
 	master_config.baudRate = spi_cfg->frequency;
-	master_config.pcsToSckDelayInNanoSec = config->pcs_sck_delay;
-	master_config.lastSckToPcsDelayInNanoSec = config->sck_pcs_delay;
-	master_config.betweenTransferDelayInNanoSec = config->transfer_delay;
+
+	/* TODO: deprecate the DT delay props */
+	master_config.pcsToSckDelayInNanoSec = config->pcs_sck_delay ?
+		config->pcs_sck_delay : spi_cfg->cs.pcs_to_sck_delay_ns;
+	master_config.lastSckToPcsDelayInNanoSec = config->sck_pcs_delay ?
+		config->sck_pcs_delay : spi_cfg->cs.sck_to_pcs_delay_ns;
+	if (config->transfer_delay > 0) {
+		master_config.betweenTransferDelayInNanoSec = config->transfer_delay;
+	} else if (spi_cfg->dfs_delay_ns > 0) {
+		master_config.betweenTransferDelayInNanoSec = spi_cfg->dfs_delay_ns;
+	} else {
+		master_config.betweenTransferDelayInNanoSec = (1000000000 / spi_cfg->frequency) / 2;
+	}
+
 	master_config.whichPcs = spi_cfg->slave + kLPSPI_Pcs0;
 	master_config.pcsActiveHighOrLow = (spi_cfg->operation & SPI_CS_ACTIVE_HIGH)
 				    ? kLPSPI_PcsActiveHigh : kLPSPI_PcsActiveLow;

drivers/spi/spi_nxp_lpspi/spi_nxp_lpspi_priv.h

@@ -99,12 +99,10 @@ void lpspi_wait_tx_fifo_empty(const struct device *dev);
 		.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),                                \
 		.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),              \
 		.irq_config_func = spi_mcux_config_func_##n,                                       \
-		.pcs_sck_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, pcs_sck_delay),                 \
-					  DT_INST_PROP(n, pcs_sck_delay)),                         \
-		.sck_pcs_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, sck_pcs_delay),                 \
-					  DT_INST_PROP(n, sck_pcs_delay)),                         \
-		.transfer_delay = UTIL_AND(DT_INST_NODE_HAS_PROP(n, transfer_delay),               \
-					   DT_INST_PROP(n, transfer_delay)),                       \
+		/* TODO: deprecate the DT delay props */                                           \
+		.pcs_sck_delay = DT_INST_PROP_OR(n, pcs_sck_delay, 0),                             \
+		.sck_pcs_delay = DT_INST_PROP_OR(n, sck_pcs_delay, 0),                             \
+		.transfer_delay = DT_INST_PROP_OR(n, transfer_delay, 0),                           \
 		.pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n),                                       \
 		.data_pin_config = DT_INST_ENUM_IDX(n, data_pin_config),                           \
 		.output_config = DT_INST_PROP(n, tristate_output),                                 \