|
148 | 148 | status = "disabled";
|
149 | 149 | };
|
150 | 150 |
|
| 151 | + lpspi3: spi@42550000 { |
| 152 | + compatible = "nxp,lpspi"; |
| 153 | + reg = <0x42550000 0x4000>; |
| 154 | + interrupts = <61 3>; |
| 155 | + clocks = <&scmi_clk IMX95_CLK_LPSPI3>; |
| 156 | + status = "disabled"; |
| 157 | + #address-cells = <1>; |
| 158 | + #size-cells = <0>; |
| 159 | + }; |
| 160 | + |
| 161 | + lpspi4: spi@42560000 { |
| 162 | + compatible = "nxp,lpspi"; |
| 163 | + reg = <0x42560000 0x4000>; |
| 164 | + interrupts = <62 3>; |
| 165 | + clocks = <&scmi_clk IMX95_CLK_LPSPI4>; |
| 166 | + status = "disabled"; |
| 167 | + #address-cells = <1>; |
| 168 | + #size-cells = <0>; |
| 169 | + }; |
| 170 | + |
151 | 171 | lpuart3: serial@42570000 {
|
152 | 172 | compatible = "nxp,imx-lpuart", "nxp,lpuart";
|
153 | 173 | reg = <0x42570000 DT_SIZE_K(64)>;
|
|
253 | 273 | status = "disabled";
|
254 | 274 | };
|
255 | 275 |
|
| 276 | + lpspi5: spi@426f0000 { |
| 277 | + compatible = "nxp,lpspi"; |
| 278 | + reg = <0x426f0000 0x4000>; |
| 279 | + interrupts = <177 3>; |
| 280 | + clocks = <&scmi_clk IMX95_CLK_LPSPI5>; |
| 281 | + status = "disabled"; |
| 282 | + #address-cells = <1>; |
| 283 | + #size-cells = <0>; |
| 284 | + }; |
| 285 | + |
| 286 | + lpspi6: spi@42700000 { |
| 287 | + compatible = "nxp,lpspi"; |
| 288 | + reg = <0x42700000 0x4000>; |
| 289 | + interrupts = <178 3>; |
| 290 | + clocks = <&scmi_clk IMX95_CLK_LPSPI6>; |
| 291 | + status = "disabled"; |
| 292 | + #address-cells = <1>; |
| 293 | + #size-cells = <0>; |
| 294 | + }; |
| 295 | + |
| 296 | + lpspi7: spi@42710000 { |
| 297 | + compatible = "nxp,lpspi"; |
| 298 | + reg = <0x42710000 0x4000>; |
| 299 | + interrupts = <179 3>; |
| 300 | + clocks = <&scmi_clk IMX95_CLK_LPSPI7>; |
| 301 | + status = "disabled"; |
| 302 | + #address-cells = <1>; |
| 303 | + #size-cells = <0>; |
| 304 | + }; |
| 305 | + |
| 306 | + lpspi8: spi@42720000 { |
| 307 | + compatible = "nxp,lpspi"; |
| 308 | + reg = <0x42720000 0x4000>; |
| 309 | + interrupts = <180 3>; |
| 310 | + clocks = <&scmi_clk IMX95_CLK_LPSPI8>; |
| 311 | + status = "disabled"; |
| 312 | + #address-cells = <1>; |
| 313 | + #size-cells = <0>; |
| 314 | + }; |
| 315 | + |
256 | 316 | tpm1: pwm@44310000 {
|
257 | 317 | compatible = "nxp,kinetis-tpm";
|
258 | 318 | reg = <0x44310000 0x88>;
|
|
295 | 355 | status = "disabled";
|
296 | 356 | };
|
297 | 357 |
|
| 358 | + lpspi1: spi@44360000 { |
| 359 | + compatible = "nxp,lpspi"; |
| 360 | + reg = <0x44360000 0x4000>; |
| 361 | + interrupts = <16 3>; |
| 362 | + clocks = <&scmi_clk IMX95_CLK_LPSPI1>; |
| 363 | + status = "disabled"; |
| 364 | + #address-cells = <1>; |
| 365 | + #size-cells = <0>; |
| 366 | + }; |
| 367 | + |
| 368 | + lpspi2: spi@44370000 { |
| 369 | + compatible = "nxp,lpspi"; |
| 370 | + reg = <0x44370000 0x4000>; |
| 371 | + interrupts = <17 3>; |
| 372 | + clocks = <&scmi_clk IMX95_CLK_LPSPI2>; |
| 373 | + status = "disabled"; |
| 374 | + #address-cells = <1>; |
| 375 | + #size-cells = <0>; |
| 376 | + }; |
| 377 | + |
298 | 378 | lpuart1: serial@44380000 {
|
299 | 379 | compatible = "nxp,imx-lpuart", "nxp,lpuart";
|
300 | 380 | reg = <0x44380000 DT_SIZE_K(64)>;
|
|
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