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| 1 | +/* |
| 2 | + * Copyright (c) 2024 BayLibre, SAS |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#define DT_DRV_COMPAT ti_cc23x0_rtc_timer |
| 8 | + |
| 9 | +#include <soc.h> |
| 10 | + |
| 11 | +#include <zephyr/device.h> |
| 12 | +#include <zephyr/drivers/clock_control.h> |
| 13 | +#include <zephyr/drivers/timer/system_timer.h> |
| 14 | +#include <zephyr/irq.h> |
| 15 | +#include <zephyr/spinlock.h> |
| 16 | +#include <zephyr/sys_clock.h> |
| 17 | +#include <zephyr/sys/util.h> |
| 18 | + |
| 19 | +#include <inc/hw_rtc.h> |
| 20 | +#include <inc/hw_types.h> |
| 21 | +#include <inc/hw_evtsvt.h> |
| 22 | +#include <inc/hw_memmap.h> |
| 23 | + |
| 24 | +#define RTC_TIMEOUT_MAX 0xFFBFFFFFU |
| 25 | + |
| 26 | +/* Set rtc interrupt to lowest priority */ |
| 27 | +#define SYSTIM_ISR_PRIORITY 3U |
| 28 | + |
| 29 | +/* Keep track of rtc counter at previous announcement to the kernel */ |
| 30 | +static uint32_t last_rtc_count; |
| 31 | + |
| 32 | +static void rtc_isr(const void *arg); |
| 33 | +static int sys_clock_driver_init(void); |
| 34 | + |
| 35 | +void sys_clock_set_timeout(int32_t ticks, bool idle) |
| 36 | +{ |
| 37 | + ARG_UNUSED(idle); |
| 38 | + |
| 39 | + /* If timeout is necessary */ |
| 40 | + if (ticks != K_TICKS_FOREVER) { |
| 41 | + /* Get current value as early as possible */ |
| 42 | + uint32_t ticks_now = HWREG(RTC_BASE + RTC_O_TIME8U); |
| 43 | + |
| 44 | + if ((ticks_now + ticks) >= RTC_TIMEOUT_MAX) { |
| 45 | + /* Reset timer and start from 0 */ |
| 46 | + HWREG(RTC_BASE + RTC_O_CTL) = 0x1; |
| 47 | + HWREG(RTC_BASE + RTC_O_CH0CC8U) = ticks; |
| 48 | + } |
| 49 | + |
| 50 | + HWREG(RTC_BASE + RTC_O_CH0CC8U) = ticks_now + ticks; |
| 51 | + } |
| 52 | +} |
| 53 | + |
| 54 | +uint32_t sys_clock_elapsed(void) |
| 55 | +{ |
| 56 | + uint32_t current_rtc_count = HWREG(RTC_BASE + RTC_O_TIME8U); |
| 57 | + |
| 58 | + uint32_t elapsed_rtc; |
| 59 | + |
| 60 | + if (current_rtc_count >= last_rtc_count) { |
| 61 | + elapsed_rtc = current_rtc_count - last_rtc_count; |
| 62 | + } else { |
| 63 | + elapsed_rtc = (0xFFFFFFFF - last_rtc_count) + current_rtc_count; |
| 64 | + } |
| 65 | + |
| 66 | + int32_t elapsed_ticks = elapsed_rtc; |
| 67 | + |
| 68 | + return elapsed_ticks; |
| 69 | +} |
| 70 | + |
| 71 | +uint32_t sys_clock_cycle_get_32(void) |
| 72 | +{ |
| 73 | + return HWREG(RTC_BASE + RTC_O_TIME8U); |
| 74 | +} |
| 75 | + |
| 76 | +void rtc_isr(const void *arg) |
| 77 | +{ |
| 78 | + uint32_t current_rtc_count = HWREG(RTC_BASE + RTC_O_TIME8U); |
| 79 | + |
| 80 | + uint32_t elapsed_rtc; |
| 81 | + |
| 82 | + if (current_rtc_count >= last_rtc_count) { |
| 83 | + elapsed_rtc = current_rtc_count - last_rtc_count; |
| 84 | + } else { |
| 85 | + elapsed_rtc = (0xFFFFFFFF - last_rtc_count) + current_rtc_count; |
| 86 | + } |
| 87 | + |
| 88 | + int32_t elapsed_ticks = elapsed_rtc; |
| 89 | + |
| 90 | + HWREG(RTC_BASE + RTC_O_ICLR) = 0x1; |
| 91 | + |
| 92 | + sys_clock_announce(elapsed_ticks); |
| 93 | + |
| 94 | + last_rtc_count = current_rtc_count; |
| 95 | +} |
| 96 | + |
| 97 | +static int sys_clock_driver_init(void) |
| 98 | +{ |
| 99 | + uint32_t now_ticks; |
| 100 | + |
| 101 | + now_ticks = HWREG(RTC_BASE + RTC_O_TIME8U); |
| 102 | + last_rtc_count = now_ticks; |
| 103 | + |
| 104 | + HWREG(RTC_BASE + RTC_O_ICLR) = 0x3; |
| 105 | + HWREG(RTC_BASE + RTC_O_IMCLR) = 0x3; |
| 106 | + |
| 107 | + HWREG(EVTSVT_BASE + EVTSVT_O_CPUIRQ16SEL) = EVTSVT_CPUIRQ16SEL_PUBID_AON_RTC_COMB; |
| 108 | + HWREG(RTC_BASE + RTC_O_CH0CC8U) = now_ticks + RTC_TIMEOUT_MAX; |
| 109 | + |
| 110 | + HWREG(RTC_BASE + RTC_O_IMASK) = 0x1; |
| 111 | + HWREG(RTC_BASE + RTC_O_ARMSET) = 0x1; |
| 112 | + |
| 113 | + /* Take configurable interrupt IRQ16 for rtc */ |
| 114 | + IRQ_CONNECT(CPUIRQ16_IRQn, SYSTIM_ISR_PRIORITY, rtc_isr, 0, 0); |
| 115 | + irq_enable(CPUIRQ16_IRQn); |
| 116 | + |
| 117 | + return 0; |
| 118 | +} |
| 119 | + |
| 120 | +SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, CONFIG_SYSTEM_CLOCK_INIT_PRIORITY); |
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