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drivers: timer: Add RTC timer driver for cc23x0
Add support for RTC as timer for cc23x0 SoC. Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
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drivers/timer/CMakeLists.txt

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@@ -12,6 +12,7 @@ zephyr_library_sources_ifdef(CONFIG_ARM_ARCH_TIMER arm_arch_timer.c)
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zephyr_library_sources_ifdef(CONFIG_INTEL_ADSP_TIMER intel_adsp_timer.c)
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zephyr_library_sources_ifdef(CONFIG_CC13XX_CC26XX_RTC_TIMER cc13xx_cc26xx_rtc_timer.c)
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zephyr_library_sources_ifdef(CONFIG_CC23X0_SYSTIM_TIMER cc23x0_systim_timer.c)
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zephyr_library_sources_ifdef(CONFIG_CC23X0_RTC_TIMER cc23x0_rtc_timer.c)
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zephyr_library_sources_ifdef(CONFIG_CH32V00X_SYSTICK wch_systick_ch32v00x.c)
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zephyr_library_sources_ifdef(CONFIG_CORTEX_M_SYSTICK cortex_m_systick.c)
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zephyr_library_sources_ifdef(CONFIG_ESP32_SYS_TIMER esp32_sys_timer.c)

drivers/timer/Kconfig.cc23x0_rtc

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# Copyright (c) 2024 BayLibre, SAS
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#
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# SPDX-License-Identifier: Apache-2.0
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config CC23X0_RTC_TIMER
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bool "TI SimpleLink CC23X0 RTC system clock timer"
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default y
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depends on HAS_CC23X0_SDK
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select TICKLESS_CAPABLE
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help
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This module provides the RTC as "system clock driver" interfaces
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for the TI Simplelink CC23X0 devices.

drivers/timer/cc23x0_rtc_timer.c

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/*
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* Copyright (c) 2024 BayLibre, SAS
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ti_cc23x0_rtc_timer
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#include <soc.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/timer/system_timer.h>
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#include <zephyr/irq.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/sys_clock.h>
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#include <zephyr/sys/util.h>
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#include <inc/hw_rtc.h>
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#include <inc/hw_types.h>
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#include <inc/hw_evtsvt.h>
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#include <inc/hw_memmap.h>
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#define RTC_TIMEOUT_MAX 0xFFBFFFFFU
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/* Set rtc interrupt to lowest priority */
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#define SYSTIM_ISR_PRIORITY 3U
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/* Keep track of rtc counter at previous announcement to the kernel */
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static uint32_t last_rtc_count;
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static void rtc_isr(const void *arg);
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static int sys_clock_driver_init(void);
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void sys_clock_set_timeout(int32_t ticks, bool idle)
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{
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ARG_UNUSED(idle);
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/* If timeout is necessary */
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if (ticks != K_TICKS_FOREVER) {
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/* Get current value as early as possible */
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uint32_t ticks_now = HWREG(RTC_BASE + RTC_O_TIME8U);
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if ((ticks_now + ticks) >= RTC_TIMEOUT_MAX) {
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/* Reset timer and start from 0 */
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HWREG(RTC_BASE + RTC_O_CTL) = 0x1;
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HWREG(RTC_BASE + RTC_O_CH0CC8U) = ticks;
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}
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HWREG(RTC_BASE + RTC_O_CH0CC8U) = ticks_now + ticks;
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}
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}
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uint32_t sys_clock_elapsed(void)
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{
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uint32_t current_rtc_count = HWREG(RTC_BASE + RTC_O_TIME8U);
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uint32_t elapsed_rtc;
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if (current_rtc_count >= last_rtc_count) {
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elapsed_rtc = current_rtc_count - last_rtc_count;
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} else {
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elapsed_rtc = (0xFFFFFFFF - last_rtc_count) + current_rtc_count;
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}
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int32_t elapsed_ticks = elapsed_rtc;
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return elapsed_ticks;
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}
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uint32_t sys_clock_cycle_get_32(void)
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{
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return HWREG(RTC_BASE + RTC_O_TIME8U);
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}
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void rtc_isr(const void *arg)
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{
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uint32_t current_rtc_count = HWREG(RTC_BASE + RTC_O_TIME8U);
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uint32_t elapsed_rtc;
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if (current_rtc_count >= last_rtc_count) {
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elapsed_rtc = current_rtc_count - last_rtc_count;
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} else {
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elapsed_rtc = (0xFFFFFFFF - last_rtc_count) + current_rtc_count;
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}
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int32_t elapsed_ticks = elapsed_rtc;
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HWREG(RTC_BASE + RTC_O_ICLR) = 0x1;
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sys_clock_announce(elapsed_ticks);
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last_rtc_count = current_rtc_count;
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}
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static int sys_clock_driver_init(void)
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{
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uint32_t now_ticks;
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now_ticks = HWREG(RTC_BASE + RTC_O_TIME8U);
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last_rtc_count = now_ticks;
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HWREG(RTC_BASE + RTC_O_ICLR) = 0x3;
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HWREG(RTC_BASE + RTC_O_IMCLR) = 0x3;
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HWREG(EVTSVT_BASE + EVTSVT_O_CPUIRQ16SEL) = EVTSVT_CPUIRQ16SEL_PUBID_AON_RTC_COMB;
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HWREG(RTC_BASE + RTC_O_CH0CC8U) = now_ticks + RTC_TIMEOUT_MAX;
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HWREG(RTC_BASE + RTC_O_IMASK) = 0x1;
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HWREG(RTC_BASE + RTC_O_ARMSET) = 0x1;
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/* Take configurable interrupt IRQ16 for rtc */
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IRQ_CONNECT(CPUIRQ16_IRQn, SYSTIM_ISR_PRIORITY, rtc_isr, 0, 0);
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irq_enable(CPUIRQ16_IRQn);
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return 0;
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}
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SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2, CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);

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